<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/111430>111430</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Enabling copy constrain DAG mutation on AMDGPU fails verifier
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            kerbowa,
            jrbyrnes
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          arsenm
      </td>
    </tr>
</table>

<pre>
    Trying to enable the copy constrain dag mutation fails the verifier, apparently from breaking liveness of copies:

test/CodeGen/AMDGPU/schedule-xdl-resource.ll fails with this:

```
*** Bad machine code: Using an undefined physical register ***
- function:    schedule-xdl-resource
- basic block: %bb.0 (0x14e08a520)
- instruction: $agpr47 = V_ACCVGPR_WRITE_B32_e64 $vgpr18, implicit $exec, implicit-def $agpr32_agpr33_agpr34_agpr35_agpr36_agpr37_agpr38_agpr39_agpr40_agpr41_agpr42_agpr43_agpr44_agpr45_agpr46_agpr47, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
- operand 1:   $vgpr18

```

Unfortunately this does not reproduce on the MIR out of -stop-before=machine-scheduler.

I tried enabling this in this branch: https://github.com/arsenm/llvm-project/tree/amdgpu-constrain-copy-dag-mutation
</pre>
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