<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/110190>110190</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86_64] [AMX] Wrong tile register reload instruction is generated
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          ienkovich
      </td>
    </tr>
</table>

<pre>
    [amx-reload-bug.txt](https://github.com/user-attachments/files/17157112/amx-reload-bug.txt)

I build LLC from the main branch and compile the attached test case with `-mcpu=sapphirerapids`. The resulting assembly code has the following instructions:
```
        tilestored      %tmm0, 6016(%rsp,%rax)  # 1024-byte Folded Spill
        tileloadd       6016(%rsp), %tmm7       # 1024-byte Folded Reload
```
Here tile reload misses index register with a stride, therefore zero stride is used and the first row of the stored tile is broadcasted. Also, it looks like this spill/reload pair can be avoided.
</pre>
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