<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/107946>107946</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [LoongArch] Redundant sext after 32-bit signed divisions
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            missed-optimization,
            backend:loongarch,
            llvm:SelectionDAG
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dtcxzyw
      </td>
    </tr>
</table>

<pre>
    ```
; bin/llc -mtriple=loongarch64 test.ll -o -
define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
entry:
  %r = sdiv i32 %a, %b
  ret i32 %r
}
```
```
; LA64-LABEL: sdiv_si32_ui32_ui32:
; LA64:       # %bb.0: # %entry
; LA64-NEXT: addi.w $a1, $a1, 0
; LA64-NEXT:    addi.w $a0, $a0, 0
; LA64-NEXT: div.d $a0, $a0, $a1
; LA64-NEXT:    addi.w $a0, $a0, 0
; LA64-NEXT: ret
```
`div.d + addi.w` can be folded into `div.w` since both the divisor and dividend are 32-bit sign-extended.
See https://github.com/llvm/llvm-project/pull/107432/files#r1747088467 for more details.

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJysVE2P5CYQ_TX4UrKFAdvjgw_u9XYuoxyyOeS2AlPuJqGhBbh3Zn995K_NZDOJFGlbLbtwvVf1qgqQMZqLQ-xIdSLVkMk5XX3odBpfvr5-yZTXrx2p6f6nA6E94SdQxhF2tnaE_JaCuVskfLDeu4sM47UWkDCmwlrIPeQbTeNkHMKa7iWB4QyIoFGbx-doOPs8Hw_CnlYnqyRhH2C3FWEtkOa0BUOXwivh_baCBRCA8AGWePCWvlJ3VMB0-MJeSzPsxnc1_rPk574W-XN_-vhMeA_v6T7kHOgFt_0I46sQVdDl477civh7gp8__vbrApFam-ILECZkuZWxG98rOggAbzn04ND_4mjzKPQ7-C3Zj8sTMP1blw8Jpz0qqSmM0oFCmLzVqMG45GFHru5o3IigfLpCuuJShIk-gHR6tTU6DTIgcJYrk9YNl-NLQqdRF1viT4hwTekel5mxM2Hni0nXWRWjv637-nG88nvwv-OYCDvfZ2sJO5e0EcsmPU_GYiSMh7IRDX16EnUDkw9w8wFBY5LGxj1fpjuuW97KDLuyYVXLy7rm2bVToppqNcpSi1GVkypVO6pa1g0XTd2UTWY6RpmgbUlpyRrBiyfdSiErLFFXkxpLIijepLHForbw4ZKZGGfsStq0os6sVGjjeroZu5kYUef-nszNfJXJeEcYI-wDYUzJ8Q90mvD-2zH-5lv7wftPaHFcSEP_0-Krhix0a5PUfIlEUGtiin8JSSbZ9WJ5XiL2S8RqgF9Qz05LlyAu94CcEoa3s8JtjNF4F7M52O5_D2ptQNxGtfTg0bE_AwAA__9YSmQL">