<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/107447>107447</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU] illegal VGPR to SGPR copy
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            shiltian
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          shiltian
      </td>
    </tr>
</table>

<pre>
    Reproducer:

```
define amdgpu_kernel void @ker_TestDynamicAllocInAllThreads_CodeObj(i64 %perThreadSize) {
entry:
  %mul4 = shl i64 %perThreadSize, 1
 %call.i = tail call fastcc ptr addrspace(1) @__ockl_dm_alloc(i64 %mul4)
 ret void
}

declare fastcc ptr addrspace(1) @__ockl_dm_alloc(i64 inreg)
```

Machine function:

```
# Machine code for function ker_TestDynamicAllocInAllThreads_CodeObj: NoPHIs, TracksLiveness, NoVRegs, TiedOpsRewritten, TracksDebugUserValues
Function Live Ins: $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr12, $sgpr13, $sgpr14, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr15, $sgpr10_sgpr11

bb.0.entry:
  liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr15, $sgpr10_sgpr11
  $sgpr32 = S_MOV_B32 0
  $sgpr10 = S_ADD_U32 $sgpr10, $sgpr15, implicit-def $scc
  $sgpr11 = S_ADDC_U32 $sgpr11, 0, implicit-def dead $scc, implicit $scc
 S_SETREG_B32 $sgpr10, -2028, implicit-def $mode, implicit $mode
 S_SETREG_B32 $sgpr11, -2027, implicit-def $mode, implicit $mode
  $sgpr0 = S_ADD_U32 $sgpr0, $sgpr15, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
  $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
 $sgpr10_sgpr11 = S_MOV_B64 $sgpr8_sgpr9
  renamable $sgpr16_sgpr17 = S_LOAD_DWORDX2_IMM renamable $sgpr6_sgpr7, 0, 0 :: (dereferenceable invariant load (s64) from %ir.perThreadSize.kernarg.offset1, align 16, addrspace 4
)
  $sgpr0_sgpr1 = S_LSHL_B64 renamable $sgpr16_sgpr17, 1, implicit-def dead $scc
  renamable $sgpr8 = S_ADD_U32 renamable $sgpr6, 8, implicit-def $scc
  renamable $sgpr9 = S_ADDC_U32 killed renamable $sgpr7, 0, implicit-def dead $scc, implicit $scc
  BUNDLE implicit-def $sgpr6_sgpr7, implicit-def $sgpr6, implicit-def $sgpr6_lo16, implicit-def $sgpr6_hi16, implicit-def $sgpr7, implicit-def $sgpr7_lo16, implicit-def $sgpr7_hi16, implicit-def $scc {
    $sgpr6_sgpr7 = S_GETPC_B64
 $sgpr6 = S_ADD_U32 internal $sgpr6, target-flags(amdgpu-gotprel32-lo) @__ockl_dm_alloc + 4, implicit-def $scc
    $sgpr7 = S_ADDC_U32 internal $sgpr7, target-flags(amdgpu-gotprel32-hi) @__ockl_dm_alloc + 12, implicit-def $scc, implicit internal $scc
  }
  renamable $sgpr6_sgpr7 = S_LOAD_DWORDX2_IMM killed renamable $sgpr6_sgpr7, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
  renamable $vgpr2 = V_LSHLREV_B32_e64 20, killed $vgpr2, implicit $exec
  renamable $vgpr1 = V_LSHLREV_B32_e64 10, killed $vgpr1, implicit $exec
  renamable $vgpr3 = V_ALIGNBIT_B32_e64 killed $sgpr17, $sgpr16, 31, implicit $exec
  renamable $vgpr31 = V_OR3_B32_e64 killed $vgpr0, killed $vgpr1, killed $vgpr2, implicit $exec
  $sgpr1 = COPY killed renamable $vgpr3
  dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr6_sgpr7, @__ockl_dm_alloc, <regmask $sgpr_null $sgpr_null_hi $src_private_base $src_private_base_hi $src_private_base_lo $src
_private_limit $src_private_limit_hi $src_private_limit_lo $src_shared_base $src_shared_base_hi $src_shared_base_lo $src_shared_limit $src_shared_limit_hi $src_shared_limit_lo $sgpr30 $sgpr31 $sgpr32 $sgpr33 $sgpr34 $sgpr35 $sgpr36 $sgpr37 $sgpr38 $sgpr39 $sgpr40 $sgpr41 $sgpr42 $sgpr43 $sgpr44 $sgpr45 $sgpr46 $sgpr47 $sgpr48 and 1194 more...>, implicit $sgpr4_sgpr5, implicit undef $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit undef $sgpr15, implicit $vgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr0, implicit $sgpr1, implicit-def dead $vgpr0, implicit-def dead $vgpr1
  S_ENDPGM 0

# End machine code for function ker_TestDynamicAllocInAllThreads_CodeObj.
```

Target/faulty machine instruction:

```
$sgpr1 = COPY killed renamable $vgpr3
```

Command:

```
llc -mtriple amdgcn-amd-amdhsa -mcpu gfx1030 reduced.ll -o -
```

This was exposed by https://github.com/llvm/llvm-project/pull/101609 when compiling hip-tests.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0WN1yqzgSfhp8ozIFAhtz4QvHJJlU5a-SnOzuFSVLbdBE_JQEPif79FvIWAaMPcmZnaoEi5b660-tVrcEUYonOcDSml1ZGKuUi4qT3MLYmkUTUldpIZcH6WRTsM_lC5SyYDUFaXkry4ks5_CcO-2ffmWw5TkgkrGkrOMPkDkItCs4Q5bvfICM30BV0WdOMk5XQhT0Ll8J8ZZKIEzF64LB0-ZPCy_43EcWnpUg932v_L9g4RBZwdXeEOSV_DRcUDM4q4WPLC9CKhVoHGCN3FbBwjNKhLC51qgIF6h5R1uiKkpRWUlEGJOqJBQsvHC1cd-J44J-iJhlMWnYH5k2xi0ctugSKj3r1kdB1HUZAyqIhN8zxXMJiTE08P7--UBo2izCts5pxYv88opZ2EMHDVowQNtCGlX05SXzVuixeP7jTjVOfpOEfqh7voMclJY8Fu8vkOw7ObCnUr3AT8mrCvKjQgSbOvmhQL4TUYPa87s5UGng0F2uGlMW9ndJKZ1Gt227nTZu2yoppR83z1lHMteSoCNZaEnYkbhdCNfrvvidF0cruvqJ9bM3tGvVbce63bXYbGzHHoay4DvgZp5fZPPPuuP354kOcg_rnfYaPzy9x1ceRs5ggOu0A1ZRFP9ohh_kJ6Z4VgpOeTVlsNU9lA7B3CPYuoemHeOcoDAg7ADV6eujv8av128v17eaf4_eFDt4MUYtKxgMAbXsAqJ7QAx-A9Es2bg3v-bMMfGZMBj4_Zzbf8vr36YxjMFuyOk83YvvlrqEnGRkI8Co77eEG7Tq90-rKI7-9fQS_RvHdw8PpxqdPaQn2Th_td_ACwYStiAhp6BVeL4jkpO8QqLQs1-oeVM60FYWWVNKuLR7ZctuyiiRiV1stwoq7UoieJIjd67bh-KB_ENKD4fBEHcX5_71j3vtj_Mz35fKS8t1znmLQdyd-qqBHd0rl2DDYWB9cCGAnQ4M_sb-Rlc_HqP769Gg6yzxaPfZjlgU7oXelJ_vPWstuAganAel9HiEQggNJtf6-Pb67XndBEh_V80HK8vzqglM0XNBRWQC1XQrSFPtF_uD4DQpqlKC8PBUFOPHG2ThK-T_RVQYvsEwGoZcgq9wSfkFLvua-xfJsW-3U4UOJ76RSO77-iS3nIvr_1-KSYpqmDbweDLUhwdN9F0njZdrXbpjmPsIaxYt2-5Bo7u14BeMb-mdSUenyO4IsvstZK9FXt3f3T5e3b0Z6CPoMc2Z1Ne8eN80dJjD04s3YsQcykYm8w3P9Wrr-un5P6NBsuuWY5PuGuE--7dcX-_i9er-_itxNnYJWSPLW0tIMqI-DipxXgvRe4lTrt8ljUvJd6SCeEMUjMnODI1F0Yr3UzKdgmdt2u5oaOEI0l5uoGKVEgmsx6Uj6gB0pSfqPQpd2SlAj4BeC9NyuyfjtuWZljmseDPTmptWYFoL0wrNEd_Y8I0N39jwjQ3f2PCNDd_Y8I0Nf4FIzpDrhj7KCgm2bVve9UkV7V8uTFedXy6iI5eOYdfxSjHWebJ1jpekE6l_nlr_MHzc4GM4Z65DJ8NGOZw9muyGKie95k71Gl8_Rs-3D6h38W-u8tc5Q9nfvs7bFz4vvOmqauGbLalF9Wms8VxVsv7SF4dvprNRGusiy0jOLpsSgqJpVkleiv1HKZpPScaa_1QRNM1oWaNk-8t1PAdJYDUFZguBpgWaXnJByhX6SRSCX2WhgKHNJ0qrqmzu7Ba-sfBNwqu03ti0yCx8I8Tu8DMtZfEn0MZ9ZS2EhW9cx507IfqZQo5okZVc8DxBKS-nFahK2RO29FjohWQCSzfAs9ncXbh4ki43czekLNzgLfZYGM4IpWHgUGcWEkY3C3fCl9jBvhM6M3fhex62A-rOyYZtQ7ydMzabW74DGeHCbpjZhUwmXKkalq4T-H4wEWQDQumPhLNoIpea_6ZOlOU7gjfcjF7FK6E_J64eotvnH9YsQs2SJkSg99vnF1QV6LX5pUX5OamlWH7bW5qZ0v7S5HZL_L8AAAD__5NtZUY">