<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/106851>106851</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[Aarch64] `bitcast i8 to <8 x i1>`, then `sext <8 x i1> to <8 x i8>` should be optimized
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
Validark
</td>
</tr>
</table>
<pre>
https://zig.godbolt.org/z/oe8rz97c4
```zig
export fn foo(i: u8) @Vector(8, u8) {
const trues: @Vector(8, u8) = @splat(0xff);
const falses: @Vector(8, u8) = @splat(0x00);
return @select(u8, @as(@Vector(8, bool), @bitCast(i)), trues, falses);
}
```
Got:
```asm
foo:
sub sp, sp, #16
sbfx w8, w0, #0, #1
fmov s0, w8
sbfx w8, w0, #1, #1
mov v0.b[1], w8
sbfx w8, w0, #2, #1
mov v0.b[2], w8
sbfx w8, w0, #3, #1
mov v0.b[3], w8
sbfx w8, w0, #4, #1
mov v0.b[4], w8
sbfx w8, w0, #5, #1
mov v0.b[5], w8
sbfx w8, w0, #6, #1
mov v0.b[6], w8
sbfx w8, w0, #7, #1
mov v0.b[7], w8
add sp, sp, #16
ret
```
Expected:
```asm
.LCPI1_0:
.byte 1
.byte 2
.byte 4
.byte 8
.byte 16
.byte 32
.byte 64
.byte 128
bar:
dup v0.8b, w0
adrp x8, .LCPI1_0
ldr d1, [x8, :lo12:.LCPI1_0]
cmtst v0.8b, v0.8b, v1.8b
ret
```
LLVM IR emitted by Zig: (`zig build-obj ./src/llvm_code.zig -O ReleaseFast -target aarch64-linux -mcpu apple_latest -femit-llvm-ir -fstrip`)
```llvm
; ModuleID = 'BitcodeBuffer'
source_filename = "llvm_code"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-musl"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local <8 x i8> @foo(i8 %0) local_unnamed_addr #0 {
%2 = bitcast i8 %0 to <8 x i1>
%3 = sext <8 x i1> %2 to <8 x i8>
ret <8 x i8> %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "frame-pointer"="none" "target-cpu"="apple-latest" "target-features"="-a510,-a520,-a65,-a710,-a720,-a76,-a78,-a78c,-addr-lsl-fast,+aes,-aggressive-fma,+alternate-sextload-cvt-f32-pattern,+altnzcv,-alu-lsl-fast,+am,+amvs,+arith-bcc-fusion,+arith-cbz-fusion,-ascend-store-address,-b16b16,-balance-fp-ops,+bf16,-brbe,+bti,-call-saved-x10,-call-saved-x11,-call-saved-x12,-call-saved-x13,-call-saved-x14,-call-saved-x15,-call-saved-x18,-call-saved-x8,-call-saved-x9,+ccdp,+ccidx,+ccpp,-chk,-clrbhb,-cmp-bcc-fusion,+complxnum,+CONTEXTIDREL2,-cortex-r82,-cpa,+crc,+crypto,-cssc,-d128,+disable-latency-sched-heuristic,-disable-ldp,-disable-stp,+dit,+dotprod,+ecv,+el2vmsa,+el3,-enable-select-opt,-ete,-exynos-cheap-as-move,-f32mm,-f64mm,-faminmax,+fgt,-fix-cortex-a53-835769,+flagm,-fmv,-force-32bit-jump-tables,+fp16fml,-fp8,-fp8dot2,-fp8dot4,-fp8fma,+fp-armv8,-fpmr,+fptoint,+fullfp16,+fuse-address,-fuse-addsub-2reg-const1,-fuse-adrp-add,+fuse-aes,+fuse-arith-logic,+fuse-crypto-eor,+fuse-csel,+fuse-literals,-gcs,-harden-sls-blr,-harden-sls-nocomdat,-harden-sls-retbr,-hbc,+hcx,+i8mm,-ite,+jsconv,-ldp-aligned-only,+lor,-ls64,+lse,-lse128,+lse2,-lut,-mec,-mops,+mpam,-mte,+neon,-nmi,-no-bti-at-return-twice,-no-neg-immediates,-no-sve-fp-ld1r,-no-zcz-fp,+nv,-outline-atomics,+pan,+pan-rwv,+pauth,-pauth-lr,+perfmon,-predictable-select-expensive,+predres,-prfm-slc-target,-rand,+ras,-rasv2,+rcpc,-rcpc3,+rcpc-immo,+rdm,-reserve-x1,-reserve-x10,-reserve-x11,-reserve-x12,-reserve-x13,-reserve-x14,-reserve-x15,-reserve-x18,-reserve-x2,-reserve-x20,-reserve-x21,-reserve-x22,-reserve-x23,-reserve-x24,-reserve-x25,-reserve-x26,-reserve-x27,-reserve-x28,-reserve-x3,-reserve-x30,-reserve-x4,-reserve-x5,-reserve-x6,-reserve-x7,-reserve-x9,-rme,+sb,+sel2,+sha2,+sha3,-slow-misaligned-128store,-slow-paired-128,-slow-strqro-store,-sm4,-sme,-sme2,-sme2p1,-sme-f16f16,-sme-f64f64,-sme-f8f16,-sme-f8f32,-sme-fa64,-sme-i16i64,-sme-lutv2,-spe,-spe-eef,-specres2,+specrestrict,+ssbs,-ssve-fp8dot2,-ssve-fp8dot4,-ssve-fp8fma,+store-pair-suppress,-stp-aligned-only,-strict-align,-sve,-sve2,-sve2-aes,-sve2-bitperm,-sve2-sha3,-sve2-sm4,-sve2p1,-tagged-globals,-the,+tlb-rmi,-tlbiw,-tme,-tpidr-el1,-tpidr-el2,-tpidr-el3,-tpidrro-el0,+tracev8.4,-trbe,+uaops,-use-experimental-zeroing-pseudos,-use-postra-scheduler,-use-reciprocal-square-root,-use-scalar-inc-vl,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,-v8.7a,-v8.8a,-v8.9a,+v8a,-v8r,-v9.1a,-v9.2a,-v9.3a,-v9.4a,-v9.5a,-v9a,+vh,-wfxt,-xs,+zcm,+zcz,-zcz-fp-workaround,+zcz-gp" }
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJysWF2P4yrS_jXuG4soxh9xLvqiP6ZfjTTnPauzR0ervWlhKCfMYOAATtL961d82ImTntkZaUfToeqh_FBUQWFMrOU7CXCf1Y9Z_XxHRrdX5v4vIjgj5ttdp9jb_d45bbPyIcMvGX5557vVTrFOCbdSZueRDL8oaM37dkOrbP2crR_Sb7OO_9_5LiJw0sq4vJd5r1SGW56VD_nYZnibZ9X6L6BOmQy3bYafJnjzGB_N8zynSlqXOzOC9-e7j5TPvstqQVyG2_Wp7zO8zcobop4I-2tM6_WCyYAbjQwmIIB6mzE8nlVrYjPc3vB2SglPEW067p6IdSEQHgx4nB5-mty7GDDbPF9F9jLc_6ecz9JHCSB2iIgP-2STp3927GKr_ajxN8Nl0VyZdf3Jt8cwkeM6mU1tsbTuB3UIT4X-Y5t6v0NSfEySOPLDetVl9WOR1c8Lth97hn-KFP8aaflTpOWvkVZXpFds1a-x1d93MRHWv0bY_NScm18j3fwU6eaalDD2w8VqwP1gi3w6aaAO2H_dJ6svT__4XLyubzbLqntzkBcfgXmOP4arj-FpSpN-veEmvPwObfMhb4ETb0fMjfds1FN02y6lY2FAmAkWp5CsOQrRRjATWeJ2rR-jVVY-CFXgrDxHrX5e0tLBWXc57lkovLAw_nEKv3z567f88x85DNw5YHn3lv-b70IRx208a_Ju5IIh1X3NVxl-sYZm-EWIw_BKFYOVt0C_53-AAGLhhViXI0fMDlxOiKH7pkKCy_GUo4HqMSdaC3gVxIE37P24yJMhbnLUW2e49i7i7YcrylsmqHzMf1NsFPD5OZ4sePPInXfpcex7MBneREurRkPhtecCJBkgGeN5BhlOKyJ5zYgjgryp0U2mgIasfADE26x88H8lRrxosvIh_HitqbLyoakQ9wumfChwi2SJI_ZPj10N4ucpZl-mQI3ym1RHGQOGhtGK-bnzrF9GSR1XMn9wzoTzdhit00btDFibS9UbgFwqA3Q01kv2TdJcqlEeuWT5kQuRjtoBBmXeMtxKJcEf0ePRkU5AHIxBzyXkzKpXoSgReVY-tfkp92H45A_c9NbR5hmufcryYPY6Sh9n9koYM-FMu3ztyHCNw7Q77qhfLOnx3KmZv8jKTxf2ZbC3cHILi0h18Vh78ZgBd-UursvrYz_8EucM70YHNvnqU7J5_N8H1Se6N2QApBWXzq9QnJXPGcbREHuDuDwQ1ePcG3YMijtmadUDcaPxLzXJFJG68CcCIjWObVOHZpPgTYI3TWza1NDQMmaQsAL14S3qKcOPJLw7IbILYeAHQP1AUpdwYCRxgHxmhCIM0YNDfYmRJs73zXbynR4CjRiv-YepPdgkGe72qKMU9aPlSl6itHs_o4hYCpIh65SB4DvY4GxXNF0R5tcRQSQF1GukdOLv-tRnOkiI4x6gRAhkyQEYOsVoLZDiBsE3SHmDVDdIfYO018gNsI2OUsr0JHF2mkStg_3-W2iE6fZdkAZ9E0aqBi1OckxRf_r9___89K8_Pz__8elLnI0yDk7ItFHTKdXUl_wovGmnQp-1Yc2wUNt8H-PWr_KwUCV9Q5bugaE9jIZbx6PxZBLmMavW6YkiLQum_NZjUYGweLwg8GGwZFJCtEFGinBhQEq7ADoIzelNKovoHohGxKJBHQLel3gYgtBUSSADlwNJIe13gaXnpykgpC5RW9abJmWiF2QXHxzCwu6VoYBK3HGHvo6DRmHDpxXX66LpBxHsdJsaphw-i1US583Va0TMcEjWg5lQ5ytHUkYhPPWk2cUmmHQ7dggb2KFwRysuuoz2_ZdPzw4HLew4oXacXqBxASBQ5hK0IC5UwR0YIoIbOxqaPTEMJLLCok6YK0QqqgZG3BVswHXRtEse7GlKEG9j2rhLW_irpUqGTAimERH-Fs6QkuIt9ovgLxK2qRJgIQIwr19hIWREjMGTAcKSHebCMehQrNAwDSoh1iE5hPohFeocR8SheA4gd-QUUo-EHeLDAIz7Mp5AewilSbDCJOSdvqM-bYY4HzU6wSUg4tTAaXJFEzkLyBwPkzK6vX8mCEikFGkw_RA91QYYp-5yx8BJg_SFPRkbYCY6qE0_ICtoepnzkCEyLRhDbATsASeE6hAw35ZnyM9aJZWF-BmwYA6ATsVSWy_Vq168VMulWi3Veqm2C3XJhJfD4uWw-Mp4OSxeDouXw-JmqW6W6tKpJXG5dGo5zHKU5SDLMbZBG1JqbZdaEClldk_OUvDACnVEA7fTDipwG47XuU8TbiI-Q9aZv41CZ7uhik3S4q7yrS6ShPqiScdw0Jqqb6pZay-72r7Es0LOVrxo-FkToztEMw2pQQB9EqkBO000as5wmsqotV1YyjbuxrkwX-jVpT6X6Pje4QOC7Kj1VHituylAKI4X4aDHc8geUmwOgFP1jXLHnQYzzPqcnqCk-B6mgDqy2wFDO6G6VHXdPuXciQ6ZWJ6c6PgxCDExTnNmEIjiUsGXSjkrRiEQ60RpCIVDuwpOuPklaiSxUCJ_AviiYvgA0hGB3sEoLndIWxiZmm20ss6Q-JYwCjATboBybfw9Atm_R2IAGaXc1GspEcQgLik6pDPn0K4KMov4LJZnsTqL9VlsvIgO7WozCe0kbGerhAT_Dts4lBfwJJSTUE1CnYSJIxTlY38KszilGv5Oh0l493gs_eiozDdi1DgVWg_vdHjtv_laecfuS7Ytt-QO7osNrouiXNf13f6e4A1poa43ZM3aFgPeAN1scVdXm3bbFt0dv8drXK3bsiiqdVVUqy3tuq4n6w3tu36z6bNqDQPhYuVvyStldnfc2hHui3XT1sWdIB0IGz5zYyzhmIdefw2pn-_MfbjPd-POZtVacOvsmcZxJ8L38Yd45c3q5zxr1heXwet7YBM-cbk9SG94ewu8vgA269zu1ShY3kGutOMDfwd2Nxpx9el9x91-7FZUDel7RmqQNupr-Pz8EqZlM_yS5n24x_8JAAD__2iC6ms">