<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/106380>106380</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] Overlapping registers allocated to input and lateout constraints
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AArch64
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          nikic
      </td>
    </tr>
</table>

<pre>
    https://llvm.godbolt.org/z/xz6PYTaW3
```llvm
target triple = "aarch64-unknown-linux-gnu"

define i1 @test(ptr %ptr) "target-features"="+lse" {
  %2 = call { i64, i64 } asm sideeffect "casp x2, x3, x2, x3, [${2}]", "=&{x2},=&{x3},r,0,1,~{memory}"(ptr %ptr, i64 0, i64 0)
  %3 = call i32 asm sideeffect "2:\0Aldxp xzr, ${0}, [${1}]\0Astxp ${0:w}, ${2}, ${3}, [${1}]\0Acbnz ${0:w}, 2b\0A", "=&r,r,r,r,~{memory}"(ptr %ptr, i64 0, i64 0)
  %4 = call i32 asm sideeffect "2:\0Aldxp xzr, ${0}, [${1}]\0Astxp ${0:w}, ${2}, ${3}, [${1}]\0Acbnz ${0:w}, 2b\0A", "=&r,r,r,r,~{memory}"(ptr %ptr, i64 undef, i64 0)
  ret i1 false
}
```
Results in:
```
<inline asm>:3:6: error: unpredictable STXP instruction, status is also a source
stxp w8, x8, x10, [x0]
```
Note that `${0:w}` and `${2}` are allocated to overlapping registers, even though a lateout `=&` constraint is used.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzsVUGP6jYQ_jWTiwVyxiGBQw4ByrF9ap_U9ug4k-CusSPb2eXtob-9cgKPfSvUS6-VwHFmxp-_74OxZQh6sEQ1bPawOWZyimfna6tftMpa132rzzGOAUQDeAI8GfN6WQ-ua52Ja-cHwNM74On6Xn7586v8XQA_Am-g5MsnlS-hKP1AkUWvR0MMxJEBopRenctiNdkX697symg7XVeDnQDxhjSPHfXaEtM5g4JHChFwO0bPADdj9IC7BLbssOpJxslTSBDimEbcm0CAyKDaL3gsrcSZhZLGpATTZQF4SA8G1ZHJcGFBd0R9TyomfCXDyK6Yiq5iHj_Mk31YQLVHqI6wWfY9sDuJEqr9dU7h4REQS8ADHjjgIQc8_A3V_kIX57_NOfwkdOHHP0x2HxSJhyIt8IkETL_j5sAb011Hdn33C8fEmy9cHkLym5BUHuJ1_F4nmrd77UPx9zfxbziqte9PcLCds5898zdv7t__5E3xvzdssh31z_zxFFNz9TI1ytJ31fFTKy-vv1KYTAxM22TXswoQB21NalcZLiB-AtEIEE0JomHkvfNpMtnRU6dVlK0h9tvXP74wbUP0k4ra2UQxRBmnwHRg0gTHJAtu8urGbvb8bTu33zLm_GbslSdDnxH72UVi8SwjS6EfjS45k7Z7JPAe9MSkMU7JSB2LjrlX8kaOo7YD8zToEMmHtDW9kmXx7KbhzCQzMpKblp2Wdi85Uy5JlNrGJGsK1K2zrhbdTuxkRnVeYbEttqKqsnMtlOC041WnWpVXklRLmG_7biP5rpOqzXSNHAu-xW2OAjflulQtbfuuLxG7PscKCk4Xqc16PrKdHzIdwkR1zkux5ZmRLZkwH_uIrVQvZDsQTdPMJ3L6B22Oma_T4lU7DQEKbnSI4QEXdTTzvXFfszmyX57Z86OD2o5TnN2-m_TwJWSTN59unEHH89Sulbvcrp_bYzV69xepCHiahQXA003ba43_BAAA__85tOU9">