<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/105881>105881</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
PeepholeOptimizerPass loses debug info
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
khuey
</td>
</tr>
</table>
<pre>
I've written a lengthy explanation in rust-lang/rust#129434 of one case where this happens, but the short version is that the peephole pass moves operands around and doesn't try to preserve their debug information. If one of those operands appears in a debug-instr-ref, the value will be lost.
Fixing this appears complicated. I think we want something like the diff at the bottom, but the part that's unclear to me is how to represent the replacement operand. It seems like perhaps we need an equivalent to `DebugOperandMemNumber` (or to extend `DebugOperandMemNumber` itself beyond stack spills) for loads.
Any thoughts @jmorse? What InstrRef is doing is pretty complicated so perhaps I'm missing a simpler solution.
```diff
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 39ba7ea77790..151bc67f85b3 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7392,17 +7392,18 @@ unsigned X86InstrInfo::commuteOperandsForFold(MachineInstr &MI,
static void printFailMsgforFold(const MachineInstr &MI, unsigned Idx) {
if (PrintFailedFusing && !MI.isCopy())
dbgs() << "We failed to fuse operand " << Idx << " in " << MI;
}
MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, unsigned OpNum,
ArrayRef<MachineOperand> MOs, MachineBasicBlock::iterator InsertPt,
- unsigned Size, Align Alignment, bool AllowCommute) const {
+ unsigned Size, Align Alignment, bool AllowCommute,
+ std::optional<MachineFunction::DebugInstrOperandPair> InstrNum) const {
bool isSlowTwoMemOps = Subtarget.slowTwoMemOps();
unsigned Opc = MI.getOpcode();
// For CPUs that favor the register form of a call or push,
// do not fold loads into calls or pushes, unless optimizing for size
// aggressively.
if (isSlowTwoMemOps && !MF.getFunction().hasMinSize() &&
(Opc == X86::CALL32r || Opc == X86::CALL64r || Opc == X86::PUSH16r ||
@@ -7494,16 +7495,19 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
// value and zero-extend the top bits. Change the destination register
// to a 32-bit one.
Register DstReg = NewMI->getOperand(0).getReg();
if (DstReg.isPhysical())
NewMI->getOperand(0).setReg(RI.getSubReg(DstReg, X86::sub_32bit));
else
NewMI->getOperand(0).setSubReg(X86::sub_32bit);
}
+ if (InstrNum) {
+ MF.makeDebugValueSubstitution(*InstrNum, {NewMI->getDebugInstrNum(), /* XXX what goes here?! */});
+ }
return NewMI;
}
if (AllowCommute) {
// If the instruction and target operand are commutable, commute the
// instruction and try again.
unsigned CommuteOpIdx2 = commuteOperandsForFold(MI, OpNum);
if (CommuteOpIdx2 == OpNum) {
@@ -8281,18 +8285,23 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
return nullptr;
// Folding a normal load. Just copy the load's address operands.
MOs.append(LoadMI.operands_begin() + NumOps - X86::AddrNumOperands,
LoadMI.operands_begin() + NumOps);
break;
}
}
+ std::optional<MachineFunction::DebugInstrOperandPair> InstrNum;
+ if (unsigned Num = LoadMI.peekDebugInstrNum()) {
+ InstrNum = {Num, 0};
+ }
return foldMemoryOperandImpl(MF, MI, Ops[0], MOs, InsertPt,
- /*Size=*/0, Alignment, /*AllowCommute=*/true);
+ /*Size=*/0, Alignment, /*AllowCommute=*/true,
+ InstrNum);
}
MachineInstr *
X86InstrInfo::foldMemoryBroadcast(MachineFunction &MF, MachineInstr &MI,
unsigned OpNum, ArrayRef<MachineOperand> MOs,
MachineBasicBlock::iterator InsertPt,
unsigned BitsSize, bool AllowCommute) const {
```
</pre>
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