<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/102703>102703</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] Fold `and` and `cmp` into `tst`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AArch64,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Kmeakin
      </td>
    </tr>
</table>

<pre>
    https://godbolt.org/z/Mh7q8TY99

InstCombine is able to fold `(x & 0xFF) < C)` into `(x & -C) != 0` 

eg:
```c
bool ult32_u32(u32 x) { return (x & 0xFF) < 32; }
```

produces
```asm
ult32_u32:
        tst     w0, #0xe0
        cset    w0, eq
        ret
```

But the same transform is not done in later stages, so if the and is introduced due to eg passing a u8 in a u32 register, the fold is not performed:

```c
bool ult32_u8(u8 x) { return x < 32; }
```

```asm
ult32_u8:
        and     w8, w0, #0xff
 cmp     w8, #32
        cset    w0, lo
        ret
```
</pre>
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