<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/101914>101914</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISC-V] `expandload` should compile to `viota`+`vrgather`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Validark
      </td>
    </tr>
</table>

<pre>
    ```zig
export fn expandload16(a: *const [16]u8, b: u16, c: @Vector(16, u8)) @Vector(16, u8) {
    return struct {
        extern fn @"llvm.masked.expandload.v16i8"(@TypeOf(a), @Vector(16, u1), @TypeOf(c)) callconv(.Unspecified) @Vector(16, u8);
 }.@"llvm.masked.expandload.v16i8"(a, @as(@Vector(16, u1), @bitCast(b)), c);
}
```

```llvm
define dso_local <16 x i8> @expandload16(ptr nocapture nonnull readonly align 1 %0, i16 zeroext %1, <16 x i8> %2) local_unnamed_addr {
Entry:
  %3 = bitcast i16 %1 to <16 x i1>
  %4 = tail call fastcc <16 x i8> @llvm.masked.expandload.v16i8(ptr nonnull readonly align 1 %0, <16 x i1> %3, <16 x i8> %2)
  ret <16 x i8> %4
}

declare void @llvm.dbg.value(metadata, metadata, metadata) #1

declare fastcc <16 x i8> @llvm.masked.expandload.v16i8(ptr nocapture, <16 x i1>, <16 x i8>) #2
```

When compiled for the Sifive x280, we check bit-by-bit and jump based on that:

```asm
...
...
...
.LBB0_2:
        andi    a2, a1, 4
        bnez    a2, .LBB0_20
.LBB0_3:
        andi    a2, a1, 8
        bnez    a2, .LBB0_21
.LBB0_4:
        andi    a2, a1, 16
        bnez    a2, .LBB0_22
.LBB0_5:
        andi    a2, a1, 32
        bnez    a2, .LBB0_23
.LBB0_6:
        andi    a2, a1, 64
        bnez    a2, .LBB0_24
.LBB0_7:
        andi    a2, a1, 128
        bnez    a2, .LBB0_25
.LBB0_8:
        andi    a2, a1, 256
        bnez    a2, .LBB0_26
.LBB0_9:
        andi    a2, a1, 512
        bnez    a2, .LBB0_27
.LBB0_10:
        andi    a2, a1, 1024
        bnez    a2, .LBB0_28
...
...
...
```

It should be able to work according to the documentation here:

https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#1651-synthesizing-vdecompress
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJykVtuO4jgQ_RrzUiJKnAvhgYduGKSRVlppZ3f2seVLhXja2Mh2GOivXzmEIX1jIi1CSlKunDp1qlwO817tDOKKlI-k3MxYF1rrVt-ZVpK55xm38rwiVXr5v6gdSTckfcDTwboAjQE8HZiR2jKZVYTWjOQPQOiDsMYHIOVjVpFy09WEroHHtS66rUH0fkX6HUWwjtD6Yo6OS0KXny0BWTxeGAAAOAydM-CD60R4vRR_eAroTCRJipRQqvVxn-yZf0aZ3Ggnx6xSNaGU0JoU6d_nA_7Z9JlEJuuPmGS3pV_uYiAumNbCmiOhdfKP8QcUqlEo7-RE8itvstgkU6mygQDzF953OHIV1swHQmt-IXkpwCgyWWyGm2ulh8fXxsjqYpLYKIMgvX3SVjANJF9nFZxA1ST_EoO-6YtDcGCsYIfQOQRjjem0BodMWqPPwLTaGciA0DKN7FRWwQs6i6cQbVmfyesQtKRR1D78U2cM26N8YlK6WyN8McGdSf5wbQtCyxxIvgGugmA-9GEiPAR7g89I_mX0RtG_EZjSfW2hYT4I8T7h-yUbBPhN2q849HQ_TfzK0GF471C8LetQNKGZQzhaJX8xlnyXHJnukNB6j4FJFvrW-vh-CYTm2Ueg_0uWoS_eSfAu-4EBvdOt_7ZoQNj9QWmU0FgHoUX4php1RDjRuhf6J4JoUTzHTpjz85yrAMxI-NHtD8CZRwnWQGhZ-NU-b0IyP2yFJEk-vfnj8TF9oqMOvPyYkaq_0siF9d1dvHbhBl9uLgNQOobNJ8HWE2CzMWwxCTarJuDSMW45Cfda2bu4-Ri3moRbTZG3GOMupulApwhcjoHrScC0nKJwNQZeTgIusykSL8bAWTpNi5ROUbn-7bb5cFt_DeBb22kJHIFxjXFm_7TuGZgQ1klldtES97q0otujCSwoa6BFh282cRvCwUcb3RK63anQdjwRdk_o1ikvjtfr_DiPBzihW64tJ3S7Zz6gI3R7WUiYtCIOxKrM5v5sQotevSizmx8lxhHk0PuZXOVymS_ZDFfZgtI6W5Z5OmtXDeMsqxvZLAWnOeccl8VC0rwpcSkWks3Uiqa0SOu0TNOyLtOEFos6WzSprIoCpeTxmN0zpZN-yFq3mynvO1xlabbMiplmHLW_ftm5VfSa827n41hWPvjbe0EF3X8D_vX123r-nZQbINXoDCdVepV_GK39kVmlR2UDi6Wij_HJ7Vho0ZEqnXVOr-4I3X9LXC7zg7M_UARCtz1_T-h2SOG4ov8FAAD__wWg2xM">