<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/99226>99226</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Implement the `unpack_u8u32` HLSL Function
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            metabug,
            backend:DirectX,
            HLSL,
            backend:SPIR-V,
            bot:HLSL
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          farzonl
      </td>
    </tr>
</table>

<pre>
    - [ ] Implement `unpack_u8u32` clang builtin,
- [ ] Link `unpack_u8u32` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `unpack_u8u32` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ ] Add codegen for `unpack_u8u32` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`
- [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/unpack_u8u32.hlsl`
- [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/unpack_u8u32-errors.hlsl`
- [ ] Create the `int_dx_unpack_u8u32` intrinsic in `IntrinsicsDirectX.td`
- [ ] Create the `DXILOpMapping` of `int_dx_unpack_u8u32` to  `219` in `DXIL.td`
- [ ] Create the  `unpack_u8u32.ll` and `unpack_u8u32_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [ ] Create the `int_spv_unpack_u8u32` intrinsic in `IntrinsicsSPIRV.td`
- [ ] In SPIRVInstructionSelector.cpp create the `unpack_u8u32` lowering and map  it to `int_spv_unpack_u8u32` in `SPIRVInstructionSelector::selectIntrinsic`.
- [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/unpack_u8u32.ll`

## DirectX

| DXIL Opcode | DXIL OpName | Shader Model | Shader Stages |
| ----------- | ----------- | ------------ | ------------- |
| 219 | Unpack4x8 | 6.6 | () |

## SPIR-V

# [OpUConvert](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpUConvert):

## Description:
  
Convert unsigned width. This is either a truncate or a zero extend.  
  
*Result Type* must be a scalar or vector of [*integer type*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Integer),
whose *Signedness* operand is 0.  
  
*Unsigned Value* must be a scalar or vector of [*integer
type*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Integer). It must have the same number of components as *Result
Type*. The component width must not equal the component width in *Result
Type*.  
  
Results are computed per component.

<table>
<colgroup>
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>4</p></td>
<td class="tableblock halign-left valign-top"><p>113</p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Result Type</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#ResultId"><em>Result &lt;id&gt;</em></a></p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Unsigned Value</em></p></td>
</tr>
</tbody>
</table>



## Test Case(s)

 
 ### Example 1
```hlsl
//dxc unpack_u8u32_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export uint4 fn(uint8_t4_packed p1) {
    return unpack_u8u32(p1);
}
```
## HLSL:

## Syntax


```syntax
uint<4> unpack_u8u32(p32u8 pk);
```


## Type Description

| Name  | [**Template Type**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-data-types.md)| [**Component Type**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-data-types.md) | Size |
|-------|--------------------------------------------------------------------|----------------------------------------------------------------------|------|
| *ret* | [**vector**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-vector.md) | [**uint**](../WinProg/windows-data-types) | 4 |
| *pk* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md) | [**uint8_t4_packed**](../WinProg/windows-data-types) | 1 |

## Minimum Shader Model

This function is supported in the following shader models.
|Shader Model | Supported|
|-------------|----------|
|[Shader Model 6.6](https://microsoft.github.io/DirectX-Specs/d3d/HLSL_ShaderModel6_6) and higher shader models | yes |

## Shader Stages



## See also


- [**Intrinsic Functions (DirectX HLSL)**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-intrinsic-functions.md)
- **See [Unpack Intrinsics](https://microsoft.github.io/DirectX-Specs/d3d/HLSL_SM_6_6_Pack_Unpack_Intrinsics#unpack-intrinsics)**
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzUWN9z4yjy_2vwCyWVjGzFfvCD48T7ddXkO1PrzOy-uZCEJS4IdIASZ_76qwbZkmwnud2bvZtNpRLRNP3j0w10Q43hhWRsgaa3aHo3oo0tlV7sqf6upBilKn9dBBhNbzGa3uFNVQtWMWkxSqJG1jR72jWzJiYoiXAmqCxw2nBhuURkhaJlt_ITl08fLsIv3JbAVQojdlxazaXhmQlLlEQDccs8x4ZVFGcly54M3it9TbpVQF0Bz_992n669WrWjcwsV3JFhQAuLoFryyrqOLkswqyur6nMVM4KJt9Xd19x29N2f6h1p2X1S0v-SIVlxppWogMJkTXQEFmvVM5-YRJ0ILJusTOIrPv2hIDhm7C9Ix1waEU7UzcXogOmtdLmqoaVZtQybEsGorm0u_ywO8fpFNkWlM0p0ndcs8z-Htr8fcF3v28-fa4faF1zWYBItX9Hn1UYZsl43gUCJLyv5jzCoc8WKvPzmV0LiGfw2HotQjxXF4FDZN36icj6YwBN_fwHENx-2fz67YpjG4nd1EYaqxuX_1smWGaVhlTE2UDvuT6hXpjmsnDeV7TGmNs2fd420e2qN3SieInipXGjk_EoicJrYICQ4BtOafbEZO4Axhk17AOQnW5E1pCnQXeanG8U0SYx_JIYkRgfo-NpNysMyYI_17A3cW_8_7Ty421Jc6bxg8qZ6BO2lhbMAKUVFHQ_-IPxJSHoCSLjuZv_6jyZHGZulISJ-4_IDJH5kf3kl8fxRAKYP9dfV0o-M23R9A6RWWltbSA4ZI3IWrOCG6tfw6dSK6lMqHTRAhsAsqZmLZ58z1k-PoIelrYSiMQ96WQOUgcoM5NpXkNW-CmMUbRs-XEj3cWU4xee2zLEjyU3mBvMuC2ZxhRb3cgMskPB6DvTCrODZTIPnRz3B5Hlr8w0wuLH15ohssRVYyxOGabYZFRQDaufXUa6I2R6i8iSS8sKprH1a_4KYDZeBaDiLsqXUhmGEVlundOSGQPWqppp2HHc4Gjo1tcjPN-oaP6oZyha_ld8C_HGertK-uzPFgNbRjZVypxZmapqJZm0BlODT-FC0bINGASedWw-G7xMqSxm_2yocILPWeBouCbuBKKfMphqv7ixLMc1052ksE3XeGVpKhiK7_0oU6LQqqn7BGzsK7DcIUKcASheYhIhMkWEYAD278yMyPrCaVsymncj3ZtA8f1vSud4pRpp_XJH7M37w_T6XBuZtxa6LfHG7AUVRnowGpoNBe5VJ3IoTY3x6Lj4p0JlT7ikghcyEGxv8bP_tqpGhHjtgM_Ea6o7e_IfInc8jt-VjKLln5aN4hWr4D9JhEXxLc8RSQr48or8ZLxK9SAxHLl_xA6Y_woQULyiKFqWmu39ckRib8AmPzH2zfrII0TW9CNz_1fInp3y_xa4lxk_yHEg9E6zaHgnP0JptaKGITIzcDu5SXdmeg5guj9Q6APxGGaTyP-6ZiBqr5D8kOFBgQy1mesXcPCIBU93yW6GAybBkmCcpNwGcCMZHHxuSzF2qBWUAVzaCd5LRGbwOdvZyQ7kwlk99jXOrTvRMdbMNloO9CIyc1wANtRNd32LO69du3NWnWxfpaWHDp_jKnOkgzkoXk1QfH-hMybNDNdPnea-zgHerzUbFEKnktPVlr6Yc1c3IstHVtUCKp72Mnvj_i64LZs0zBQUxQ8808qovb1T7tJ-4RJMXKdCpRAoT82ZebKqDozO2gC6CjjOXVTJOgwvafkhKDStS56ZwFXYObXURzGscnC9b_vqdD3_PYz3VTz_zrqauy3Cu6__6OcHiekJ6poDRJaaWSgKBzHw1eDPh723q4f7yWK3x3r2OnG_cflFq8LblKsX0wveUcIED9CArXgGhi-Sfz4wvF1vgdE7__4ULuOLnvCBS1411aCF9Qyu49q3b2XQgpimhjOZ5VBcQ829V0KoFy4LbPzqClab0AN_3hSjaL49SjjfVFf2xIkFTW8HopIwuRaw6hijsA0dV91DS7Btm5Y8zhFZw4G_80KdzGSXAELQapW8gP5y4JCD7rVr5LtLot_mX7lOt4xhKow60YMunKdXD3x8j4QGaNYa7O8kaA9_tgQ9PaQEx9w4nvfOPWcv-I2mt_5xAnePUz8mbg-7ZJfsvsCN6zXsehpI7C_jwYNPC-MoX8T5PJ7TEVuMb8h4nIyjaD4qF_tpnk2mN2MyTuj0Jp6m0ZTEcRJlaZzfJFMy4gsSkUl0M05INE4m85DeZPmE5Ol0kt6w2YShScQqykUoxHMFHfOIG9OwxXxOSDISNGXCuDd2QipmadoUrnRdIULaZy0UL0-vgu2Mz4ELtmMnfpxQFsXLI-_0bqQXYESQNoVBk0hwY01nluVWsEX3kP_Ggx-IOyXmqNFi8U72tQ9wTmut1T9YZhFZOwAgdh6D5wX5VwAAAP__OV1IYg">