<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/99209>99209</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Implement the `WaveMultiPrefixBitOr` HLSL Function
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            metabug,
            backend:DirectX,
            HLSL,
            backend:SPIR-V,
            bot:HLSL
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          farzonl
      </td>
    </tr>
</table>

<pre>
    - [ ] Implement `WaveMultiPrefixBitOr` clang builtin,
- [ ] Link `WaveMultiPrefixBitOr` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `WaveMultiPrefixBitOr` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ ] Add codegen for `WaveMultiPrefixBitOr` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`
- [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/WaveMultiPrefixBitOr.hlsl`
- [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/WaveMultiPrefixBitOr-errors.hlsl`
- [ ] Create the `int_dx_WaveMultiPrefixBitOr` intrinsic in `IntrinsicsDirectX.td`
- [ ] Create the `DXILOpMapping` of `int_dx_WaveMultiPrefixBitOr` to  `166` in `DXIL.td`
- [ ] Create the `WaveMultiPrefixBitOr.ll` and `WaveMultiPrefixBitOr_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [ ] Create the `int_spv_WaveMultiPrefixBitOr` intrinsic in `IntrinsicsSPIRV.td`
- [ ] In SPIRVInstructionSelector.cpp create the `WaveMultiPrefixBitOr` lowering and map  it to `int_spv_WaveMultiPrefixBitOr` in `SPIRVInstructionSelector::selectIntrinsic`.
- [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveMultiPrefixBitOr.ll`

## DirectX

| DXIL Opcode | DXIL OpName | Shader Model | Shader Stages |
| ----------- | ----------- | ------------ | ------------- |
| 166 | WaveMultiPrefixOp | 6.5 | ('library', 'compute', 'amplification', 'mesh', 'pixel', 'vertex', 'hull', 'domain', 'geometry', 'raygeneration', 'intersection', 'anyhit', 'closesthit', 'miss', 'callable', 'node') |

## SPIR-V

# [OpGroupNonUniformBitwiseOr](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpGroupNonUniformBitwiseOr):

## Description:
  
A bitwise or [group operation](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Group_Operation) of all *Value* operands
contributed by active [invocations](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Invocation) in the
[group](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Group). 
  
*Result Type* must be a scalar or vector of [*integer
type*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Integer). 
  
*Execution* is a [*Scope*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Scope_-id-) that identifies the group of
invocations affected by this command. It must be **Subgroup**.  
  
The identity *I* for *Operation* is 0. If *Operation* is
**ClusteredReduce**, *ClusterSize* must be present.  
  
The type of *Value* must be the same as *Result Type*.  
  
*ClusterSize* is the size of cluster to use. *ClusterSize* must be a
scalar of [*integer type*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Integer), whose *Signedness* operand is 0.
*ClusterSize* must come from a [*constant
instruction*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#ConstantInstruction). Behavior is undefined unless
*ClusterSize* is at least 1 and a power of 2. If *ClusterSize* is
greater than the size of the [group](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Group), executing this instruction
results in undefined behavior.

[Capability](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Capability): 
**GroupNonUniformArithmetic**, **GroupNonUniformClustered**,
**GroupNonUniformPartitionedNV**  
 
[Missing before](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Unified) **version 1.3**.

<table>
<colgroup>
<col style="width: 12%" />
<col style="width: 12%" />
<col style="width: 12%" />
<col style="width: 12%" />
<col style="width: 12%" />
<col style="width: 12%" />
<col style="width: 12%" />
<col style="width: 12%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
<th></th>
<th></th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>6 + variable</p></td>
<td class="tableblock halign-left valign-top"><p>360</p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Result Type</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#ResultId"><em>Result &lt;id&gt;</em></a></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Scope_-id-"><em>Scope &lt;id&gt;</em></a><br />
<em>Execution</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Group_Operation"><em>Group Operation</em></a><br />
<em>Operation</em></p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Value</em></p></td>
<td class="tableblock halign-left valign-top"><p>Optional<br />
<em>&lt;id&gt;</em><br />
<em>ClusterSize</em></p></td>
</tr>
</tbody>
</table>



## Test Case(s)

 
 ### Example 1
```hlsl
//dxc WaveMultiPrefixBitOr_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export int4 fn(int4 p1, uint4 p2) {
 return WaveMultiPrefixBitOr(p1, p2);
}
```
## HLSL:

## Syntax


```syntax
any_int<> WaveMultiPrefixBitOr(any_int<> value, uint<4> mask);
```


## Type Description

| Name  | [**Template Type**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-data-types.md)| [**Component Type**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-data-types.md) | Size |
|-------|--------------------------------------------------------------------|----------------------------------------------------------------------|------|
| *ret* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md), [**vector**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-vector.md), or [**matrix**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-matrix.md) | [**int**](../WinProg/windows-data-types), [**int16_t**](https://github.com/microsoft/DirectXShaderCompiler/wiki/16-Bit-Scalar-Types), [**int64_t**](../WinProg/windows-data-types), [**uint**](../WinProg/windows-data-types), [**uint16_t**](https://github.com/microsoft/DirectXShaderCompiler/wiki/16-Bit-Scalar-Types), or [**uint64_t**](../WinProg/windows-data-types) | any |
| *value* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md), [**vector**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-vector.md), or [**matrix**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-matrix.md) | [**int**](../WinProg/windows-data-types), [**int16_t**](https://github.com/microsoft/DirectXShaderCompiler/wiki/16-Bit-Scalar-Types), [**int64_t**](../WinProg/windows-data-types), [**uint**](../WinProg/windows-data-types), [**uint16_t**](https://github.com/microsoft/DirectXShaderCompiler/wiki/16-Bit-Scalar-Types), or [**uint64_t**](../WinProg/windows-data-types) | any |
| *mask* | [**vector**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-vector.md) | [**uint**](../WinProg/windows-data-types) | 4 |

## Minimum Shader Model

This function is supported in the following shader models.
|Shader Model | Supported|
|-------------|----------|
|[Shader Model 6.5](https://microsoft.github.io/DirectX-Specs/d3d/HLSL_ShaderModel6_5) and higher shader models | yes |

## Shader Stages

* **Library Shader**
* [**Compute Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d11/direct3d-11-advanced-stages-compute-shader.md)
* [**Amplification Shader**](https://microsoft.github.io/DirectX-Specs/d3d/MeshShader.html#amplification-shader-and-mesh-shader)
* [**Mesh Shader**](https://microsoft.github.io/DirectX-Specs/d3d/MeshShader.html)
* [**Pixel Shader**](../direct3dhlsl/dx-graphics-hlsl-writing-shaders-9.md#pixel-shader-basics)
* [**Vertex Shader**](../direct3dhlsl/dx-graphics-hlsl-writing-shaders-9.md#vertex-shader-basics)
* [**Hull Shader**](https://learn.microsoft.com/en-us/windows/uwp/graphics-concepts/hull-shader-stage--hs-)
* [**Domain Shader**](https://learn.microsoft.com/en-us/windows/uwp/graphics-concepts/domain-shader-stage--ds-)
* [**Geometry Shader**](https://learn.microsoft.com/en-us/windows/uwp/graphics-concepts/geometry-shader-stage--gs-)
* [**Raygeneration Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d12/ray-generation-shader.md)
* [**Intersection Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d12/intersection-shader.md)
* [**Anyhit Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d12/any-hit-shader.md)
* [**Closesthit Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d12/closest-hit-shader.md)
* [**Miss Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d12/miss-shader.md)
* [**Callable Shader**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3d12/callable-shader.md)
* **Node Shader**


## See also


- [**Intrinsic Functions (DirectX HLSL)**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-intrinsic-functions.md)
- **See [WaveMultiPrefix*() Functions](https://microsoft.github.io/DirectX-Specs/d3d/HLSL_ShaderModel6_5#wavemultiprefix-functions)**
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzsW9tu2zgTfhrmhpAgU7HjXORCduqugaYp6mx37wJKGlv8Q5ECSTnxPv0PkrIkn5IeNm0WaBAgFg8z33wzpIb0hGrNVgLgCg0naHh9RmtTSHW1pOofKfhZKvPNVYDRcILR8BrPy4pDCcJgNIr-omu4qblhnxQs2dOEmVuFRhHOOBUrnNaMGyYQmaIo6SR8YOLhqyfjR2YKO7rgmt8zYRQTmmU6LNAo2hGb5DnWUFKcFZA9aLyU6jktRtreqR37x4fFh4lXN6tFZpgUU8q5HcWEHbWAkrqRTKzCrKqOqc5kDisQX6f2XclMT-u7p0p12qbvm-aXVBnQRjcSHWmIzGwbIrOpzOE9CKsDkVnDpUZkdgxXaLk9SeczWiwvjQoHeX5SRQBKSaWPapoqoAawKcCqYMLc50_3p_hrI6Aha95GxDVTkJm_Q5M_r-D67_mH2-qGVhUTKytSLr9Cr5HYjhqMRp2jrKQX1R0l3AcXFfmpEfcNX36gd4FXyvm6PPAzIrPGfERmL_Orq_V3ELz4NP_85Yi9c4Fd11xoo2q3fBbAITNS2QjG2Yt8WL1cPoJiYuVYKWmFMTNN1L0M2S3SExhQnKA40e6pNQaNovAYSVZI8AWnNHsAkTvicUY1vEC-043IzIZ30G1Sp9Ybb9aA_SUxIjHees-3XUyxjS18W9mljnvPH2npnxcFzUHhG5kD7zcsDF2Bti2NoKD7wS88HzYEPUGD0cj171l0W7nWUTh0fxEZI3LBWaqo2iBygYhtu8hkWdUGugZaVpwtWUatq7rmEnTRPVXsCXj3uAZl4Kl7Lmre681lSVlP1ApkCaYPQtHNCgSoPZ1MGFAast1WKjYFMz0LuNSgzU5bybTujaCc05T3jBQy90-XWx5bh_tAa5tsHN5W75Wsq49S_CnYUqpywswj03Cr0PAakXFhTKVtNJMZIjMFK6aN2oQPhZJC6lCqVROJgQ1FXYELwFqwJYN8sI3SsDAlRyR-Rhu5tFp2whN0pljlGHJdGKMoSXDq52D7zhtOVlYgltWW4VdA7TDf37YqyKXdvinnGJHkC-U1IJJ4CCLXKEoyaVdjWhvIcbrBNDNsDRYsE2vpo0-_BtB5K95iZMJuf5bPhqVX4waRyxBvHYRI8hl0zQ2-21SOmbLWBqeAKdYZ5VRZz63dNuleg8MJIoldDytQKEqMn_U6_Hgle3DfPUFWe9YSzDSmDaZFJl8NipN9H7A8sK4yBTWY5SCMHa3da6sJ7CWKkl7YYLpcQtYElimYxpksSyryEM9Ny7QFTZJFnXq_u6cQtzbfFdBoMxs7dm4NdzkkSXph7siIQjxfHunw1CGSTHmtDSjIP0NeZ-Ab_V607Vuwf3YCoVKgQZg9RNbxLiB6i2o7wxKi7WuIanwQYD05hzqZZ1Ozf5zwzPfal3ytIXwGJEVRso3XvSjFPyVGLYePhdTOnQt7WsoF2L2_3Wu8f46a7azIZAl4qWTZhnQmhTZUGBdUbdbySqZMG2XzvqbLEE-goGsmlYVfixyWTECOa8GtdSd8SA3mQLXBA5erUVzZ1M16hmwD9GASipKVy7CUXWBiJw5cYvgT9kXrRPD7i1j5BdsnPkqUC2WXaHdcpA1DYfNCHE6mtKIp48xsXsVTnXT3Hsbt6t57XyeKmaIEw7KddX44sN0V2nGnRH6iyjBLBuQfv_gRfj17w2-Y1pa6FJZSwWsY_6dvdwmTU78GpZkUeBDGzdbZuCGeGpdrxe_8Uya5D6BeA9ZmY4dcI0IeWW4KS-eAIDJEhGCL-PfgHx6MyOyAe1MAzbsn1etA8bu_pMrxVNbC-OmusdfvTz3H-_zbRp-a2KR9R3tfodU-qZ2nXcNTmW-O0pDjjFOtPb8ukFMuswdcUM5WIuCwNHjtPxtZIUK8dsvwCCMywWuqmI9_q7bqwOX_ipJ4FD0r2SbW3ysbxVMo7V8y4gbFE5YjMlrZT16R74ynqdqJM9fcTzZ2Br8GCSie2sSjULD00xGJPYB53g7sw3rJIkRm9OfC7ae2fcCu_RvwHvNFl6r_Ek8cnAT79rlO3HV-g1mnJ72xteAT81fn_tad-ik_geJ7kPezw6_Cf7jP7uystqGXDES7dxd3oA2eUg2IjLXNqVynT2vcCDvo3RMtKw54YHtHkf91l9VRk9rkT9n-1Ze_qTWgjbvXxsEd5iy9H92PcQDCIgoGo5SZwJ5RNA5umzs_eKqkMpgJc46XApGx-1QNbAZX-8_E3xlNLEoFplbiqHJExn6am2DJjxJ0cd03oiPC3dTvXewsNsLQp46y7Sy9badic8_8mzp-dwrD7qC1PzF6W1A8PbeNJdUPHcQ-uB1f2XNn_7KpvQ91F5_-htGdnhBJ7qCsODWwPXueODqtmCnqNMxkicjshmVKark019Iloo9MxASRWcplap3sW3PQD0ZWgVZZ43x3PRvnLiLILAwP2_KnYKVoVbBMB-4aOKeGes-Hpc1od7BPZVlJAcL8R8D7K2Z7YGsvhJsb4u7TD_38S2J6grqba0QSBcYeZnZ84G8U3h73HlcTNKQH2F_UvT3AHlcH2N8Ge5wlNYo9vT3MHlcvuFvEdtPqwXXS_mLik5IrDymXj7q3QPa9xIQZjO7NV5pcbk3uvsLz3-TYHYJxUE7nA0NkNhgFE2aChQuP4O6E7tH5_Y_hr3-UgPoXMNAPufo7WXBhQMUG7-wc6-395--94_fe8Xvv-L13fMPe4ZPeva3jv7ASdxF_j1edhPODr71vmGBlXe6UL_gBdwXTeNmUX2Gmsa4re0yCvPn2FC8l5_KRiRXWfnZpZ-vQ871fEIGiy8VWwn7OeiTlbIeg4WRH1CgcHvNSG3lh4y8muxgMFs09dx7niMzsweveC3UyR_dDyxAVOS7YqgC1a5CjbtMVcXSHtX6Jx7YnaW7KP_iSi2ZQ465mQP_UURvYHfMLQnAw6D0Eg0FA8zUVGeSBdrYFTblI4Hlp3g57xiT9CpIXTfoWf92ALry87fcSO9UqDaqAijwoQRfN8xGIVtDrIjtQ-Yk9AT-i86u2gEfFDBOrxiAdXDrmY1eGs7U6pb6y6UDzF1ed8y-r9iU_L-r-o-bHjN4lmgNVIuzo9uENIqh1t4shMqsfK7sGtvAyKTKojO0pat7y4CI1CAodHMFz7WqRfgIiX_S0hyk_iul9Uw_1E1BtS6_2cK2O4vrcr8r69VuTna_oJugwPbsLzXvFY28DfL-c7fkN1FW4vQ3QVGyCgpln8U7bCry3gbmpCHwR9w3T-m0gLpnWz1PclDC-DbjbgsqjkB20jzKHg4xnJ2UCwJRr2bYHO0u3qXTeVv1rjMi4efP663J7QnhriXpbXxxs02XdUhNs683A1dTs3de7vrHNPVuLXyW3jR_pGkqrt3J6O6AtoWf5VZxfxpf0DK4GF2QwGEXj8flZcZWN4yjOBxm5SMngYkAHeZqnhKTnNB3HaZ6esSsSkfPoYjAi0eD8_DwcjweDi_EyHqUkGqVZis4jKCnjIefrMpRqdca0ruHq8pJEl2ecpsC1-18XQkowNK1X7hvFKSKkqftGcdKW0zc9PhoOhm0rW7Yd0qA42Y4dXp-pKwsiSOuVRucRZ9roDpZhhsNV9w81L1TIW7Gt485qxa-eicemUt1pr5T8H2T2jOyIsM7zXKyvyP8DAAD__4s15Yc">