<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/99158>99158</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Implement the `WaveIsFirstLane` HLSL Function
</td>
</tr>
<tr>
<th>Labels</th>
<td>
metabug,
backend:DirectX,
HLSL,
backend:SPIR-V,
bot:HLSL
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
farzonl
</td>
</tr>
</table>
<pre>
- [ ] Implement `WaveIsFirstLane` clang builtin,
- [ ] Link `WaveIsFirstLane` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `WaveIsFirstLane` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ ] Add codegen for `WaveIsFirstLane` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`
- [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/WaveIsFirstLane.hlsl`
- [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/WaveIsFirstLane-errors.hlsl`
- [ ] Create the `int_dx_WaveIsFirstLane` intrinsic in `IntrinsicsDirectX.td`
- [ ] Create the `DXILOpMapping` of `int_dx_WaveIsFirstLane` to `110` in `DXIL.td`
- [ ] Create the `WaveIsFirstLane.ll` and `WaveIsFirstLane_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [ ] Create the `int_spv_WaveIsFirstLane` intrinsic in `IntrinsicsSPIRV.td`
- [ ] In SPIRVInstructionSelector.cpp create the `WaveIsFirstLane` lowering and map it to `int_spv_WaveIsFirstLane` in `SPIRVInstructionSelector::selectIntrinsic`.
- [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveIsFirstLane.ll`
## DirectX
| DXIL Opcode | DXIL OpName | Shader Model | Shader Stages |
| ----------- | ----------- | ------------ | ------------- |
| 110 | WaveIsFirstLane | 6.0 | ('library', 'compute', 'amplification', 'mesh', 'pixel', 'vertex', 'hull', 'domain', 'geometry', 'raygeneration', 'intersection', 'anyhit', 'closesthit', 'miss', 'callable', 'node') |
## SPIR-V
# [OpGroupNonUniformElect](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpGroupNonUniformElect):
## Description:
Result is **true** only in the active [invocation](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Invocation) with the
lowest id in the [group](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Group), otherwise result is false.
*Result Type* must be a [*Boolean type*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Boolean).
*Execution* is a [*Scope*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Scope_-id-) that identifies the group of
invocations affected by this command. It must be **Subgroup**.
[Capability](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Capability):
**GroupNonUniform**
[Missing before](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Unified) **version 1.3**.
<table>
<colgroup>
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>4</p></td>
<td class="tableblock halign-left valign-top"><p>333</p></td>
<td
class="tableblock halign-left valign-top"><p><em><id></em><br />
<em>Result Type</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#ResultId"><em>Result <id></em></a></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Scope_-id-"><em>Scope <id></em></a><br />
<em>Execution</em></p></td>
</tr>
</tbody>
</table>
## Test Case(s)
### Example 1
```hlsl
//dxc WaveIsFirstLane_test.hlsl -T lib_6_8 -enable-16bit-types -O0
export bool fn() {
return WaveIsFirstLane();
}
```
## HLSL:
Returns true only for the active lane in the current wave with the smallest index.
## Syntax
``` syntax
bool WaveIsFirstLane(void);
```
## Parameters
This function has no parameters.
## Return value
True only for the active lane in the current wave with the smallest index.
## Remarks
This function can be used to identify operations that are to be executed only once per wave.
This function is supported from shader model 6.0 in all shader stages.
## Examples
``` syntax
if ( WaveIsFirstLane() )
{
. . . // once per-wave code
}
```
## See also
<dl> <dt>
[Overview of Shader Model 6](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/hlsl-shader-model-6-0-features-for-direct3d-12.md)
</dt> <dt>
[Shader Model 6](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/shader-model-6-0.md)
</dt> </dl>
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzUWF1v4zrO_jXKjWDDkZu0uchFkjbzBuicHkznfNwVsk3HeitLhiSnyf76BSUndtq0PWex3cXOBDMWSfPjISWT4taKrQKYk8mSTG5HvHWVNvOSm39oJUeZLg7ziJLJkpLJLd3UjYQalKNkmvzBd7Cxa2Gsu-cKyDShueRqS7NWSCcUYSuSLPqX74V6_ivv0RfhKhSspJVPQjkjlBW5jSsyTc40LoqCWqg5zSvIny0ttXnHgNPIWKHY_90_3i-DpXWrcie0WnEpUUoolHqEmntJobZx3jSXrOa6gC2oTy3e1cINDN7tG9MbWn3ryJ9ZcWCd7TR6qAhbI42w9UoX8A0U2iBs3SFoCVu_cilGMN_F7wMDiEan3Xu7uaQ9AmO0sReNrAxwB9RVgNqFck_F_ukCYKdEd-hsTom_FQZy92fsio913_65uX9ovvOmEWqLKnX5sUmnKQqMx0mfFFTysaULCY9D_XBVXGA-deAEmQB1sCXlrn6TSsLWXcCErT8H0za7v4fm46-bH79fiHCjqGdtlHWm9fviESTkThusT5qfmb5gUuoXMEJtPQw1bygVrqupDx31e-4dyyRdkHRh_eoUApkm8SVUUEn0O814_gyq8EjTnFv4BG1vm7A1Fm_UHzcX9pDsiht_LCUspcdMBdr1imL50IcGdy4drH_hdVg_VrwAQ7_rAuSQ8Oj4FixSOkVR_4d-sn5LiAaKxuPE818F42nTOPAIuyHsWorMcHMg7JowpF3num5aBz2B140Upcg55qgn12CrftWIPch-uQPjYN-vq1YOuIWuuRio2oKuwQ2dMPywBQXmlU2hHBgL-TmVq0Ml3CACqS1Yd0arhbUDCS4lz-QgSKWLsJodUTylO1TYiYQF-NB8M7ptftHqNyVKbeo7rFUyuSXspnKusVjCbE3Y2sBWWGcO8XNltNI21mbblV-E9Wcb8FXXKlEKKMbH0owrV0vC0ncssRlaOCtKsLkRjUfGsyglyeIH2FY6KiwlbEHYwpkWwhPVSh5wk-De5rkTO8DIhNrpLtNfEM2m185m4ZPvKiDJAo8R66gojh6RyXKLgX-FFx5RhJCtqHYVmBdhgZoTVCWXFmKPn_-HsCOOPw8Nwkfr1jqaAeXoJ2GLpdYSuKIu8L_C6c4EYbNzz-72kLcB0QU6f3TpMddf5ovX_RSJIsI0uopj5kA5lLY-fT53VJckWfQVZSkvS8gdFDQ7UFcJS3Nd11wVMd24E6ihPh_bLBSAX8VdrU-WK97wTEjhDl8R2UC732JHlAlbvNqH3S7qUzFZfhfW4qcwg1Ib-Ar3fgt0f0p5-zswVmhFx3F6DlS6cv6AS-_CKtcywDkgUOsOKHJLGHsRhaswYJYQNiGMUfT4f1mYsPWboF0FvOhXZsAg6d0f2hR0pVvlwuueOOCHL_xlXjgg7HsvguGqeIf7hoorc7Y6dxvns4tBFDhTWRvQ8fnPpM6facWl2KpIQunoLjw73RDGgnXE5ypYanp_in-L3jRNP9RMksW_rJukK6jxfzaVjqRLURA23eJTMBSY6SozZ4XhycMD_Uz4K0Ag6YqTZFEZKMPrhKXBgU1xEhy69VlEhK35f9bd4ZE_dNjT_4a_l3LRf8L-Uibebo-zDYGEwdGXnLdJP7HNWHELhN1YPOM905_iQQKF7vbY8wIdI3eahJ8fc5PuIC_2-eve-glnDD8M0-gnlSJ7mj7d0AgUOhONp5lwEfYHlkYP3TwB-0YbRzOtJS2V78ex_Vz6bwqlBlxr1Gs7QQwhxlb_duhiH6Yf3o8d4g-vx1Js_kLbV2oz7PskjgZd45W3xoBy9IXv4NShUVtzKX2HpgrYx-f98UE5vu-BPnpD7ZHhA3wbxk5jvRxDGQbxKmm_csNrwNY_kH9i61B29zi04pYqTZuT0Ll7IXqs9Ra6178Ghx9Qc_N80cWcK-xsWgsFDsdds3SguulGHBu6KG4A-RlQ8HsCiuCnVjnQBoz3Jr5kQVhq2wbLCQpaGl1TG2bM2g-dOPMJRbmUR7r1s2dMz-BeMbI4n3W7rWDfzS0VJU6Sl6uUdjvsVNKx_xv20CmqyGPsv60XS7qvNADKpdWnHqeQJL2j-OD67T5ZPuzA7AS8UF2ez97TS03ZVriqzeJc14Stv4vcaKtLd6t9J_YiVMoIW2dSZ7jvA7UA--x0E1mTd-eBvxJIC39IdLcKAejIJyCaRklUAnetARuV2kTHN6Ixi-uiw8mfXj6Wt0H9VwJ5HcN7ruIz5mJUzNNils74CObjazYeT5N0PBtV8-tpzjlPJ8lNkadpmQO_ZnnKxzcpLyZXk6uRmLOEXSXX4ylLksl4GqdjNs7y9IbfZHwG05xcJVBzIWMpdzU2ziNhbQvz2Ww8uRlJnoG0_kKbsRocz9qt_3KtCGPd5RBJF6dLto4TLjnfiB0b8iNDO5IujrKT25GZoxNR1m4tuUqksM72bjnhJMz7W_P3L89QIz3eR49aI-cfJLS7yfKGG6P_318DrD0GmMkAw27O_hkAAP__BR8z6w">