<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/99090>99090</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Implement the `AllMemoryBarrierWithGroupSync` HLSL Function
</td>
</tr>
<tr>
<th>Labels</th>
<td>
metabug,
backend:DirectX,
HLSL,
backend:SPIR-V,
bot:HLSL
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
farzonl
</td>
</tr>
</table>
<pre>
- [ ] Implement `AllMemoryBarrierWithGroupSync` clang builtin,
- [ ] Link `AllMemoryBarrierWithGroupSync` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `AllMemoryBarrierWithGroupSync` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ ] Add codegen for `AllMemoryBarrierWithGroupSync` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`
- [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/AllMemoryBarrierWithGroupSync.hlsl`
- [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/AllMemoryBarrierWithGroupSync-errors.hlsl`
- [ ] Create the `int_dx_AllMemoryBarrierWithGroupSync` intrinsic in `IntrinsicsDirectX.td`
- [ ] Create the `DXILOpMapping` of `int_dx_AllMemoryBarrierWithGroupSync` to `80` in `DXIL.td`
- [ ] Create the `AllMemoryBarrierWithGroupSync.ll` and `AllMemoryBarrierWithGroupSync_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [ ] Create the `int_spv_AllMemoryBarrierWithGroupSync` intrinsic in `IntrinsicsSPIRV.td`
- [ ] In SPIRVInstructionSelector.cpp create the `AllMemoryBarrierWithGroupSync` lowering and map it to `int_spv_AllMemoryBarrierWithGroupSync` in `SPIRVInstructionSelector::selectIntrinsic`.
- [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AllMemoryBarrierWithGroupSync.ll`
## DirectX
| DXIL Opcode | DXIL OpName | Shader Model | Shader Stages |
| ----------- | ----------- | ------------ | ------------- |
| 80 | Barrier | 6.0 | () |
## SPIR-V
# [OpControlBarrier](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpControlBarrier):
## Description:
Wait for all active invocations within the specified
[*Scope*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Scope_-id-) to reach the current point of execution.
All active [invocations](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Invocation) within *Execution* scope reach
this point of execution before any invocation proceeds beyond it.
When *Execution* is **Workgroup** or larger, behavior is undefined
unless all invocations within *Execution* execute the same dynamic
instance of this instruction.
If *Semantics* is not **None**, this instruction also serves as an
[**OpMemoryBarrier**](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpMemoryBarrier) instruction, and also performs
and adheres to the description and semantics of an **OpMemoryBarrier**
instruction with the same *Memory* and *Semantics* operands. This allows
atomically specifying both a control barrier and a memory barrier (that
is, without needing two instructions). If *Semantics* is **None**,
*Memory* is ignored.
Before **version 1.3**, it is only valid to use this instruction with
**TessellationControl**, **GLCompute**, or **Kernel** [execution
models](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Execution_Model). There is no such restriction starting with
**version 1.3**.
If used with the **TessellationControl** [execution
model](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Execution_Model), it also implicitly synchronizes the **Output**
[Storage Class](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Storage_Class): Writes to **Output** variables
performed by any invocation executed prior to a **OpControlBarrier** are
visible to any other invocation proceeding beyond that
**OpControlBarrier**.
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<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>4</p></td>
<td class="tableblock halign-left valign-top"><p>224</p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Scope_-id-"><em>Scope <id></em></a><br />
<em>Execution</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Scope_-id-"><em>Scope <id></em></a><br />
<em>Memory</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Memory_Semantics_-id-"><em>Memory Semantics
<id></em></a><br />
<em>Semantics</em></p></td>
</tr>
</tbody>
</table>
## Test Case(s)
### Example 1
```hlsl
//dxc AllMemoryBarrierWithGroupSync_test.hlsl -T lib_6_8 -enable-16bit-types -O0
export void fn() {
return AllMemoryBarrierWithGroupSync();
}
```
## HLSL:
Blocks execution of all threads in a group until all memory accesses have been completed and all threads in the group have reached this call.
## Syntax
``` syntax
void AllMemoryBarrierWithGroupSync(void);
```
## Parameters
This function has no parameters.
## Return value
This function does not return a value.
## Remarks
A memory barrier guarantees that outstanding memory operations have completed. Threads are synchronized at GroupSync barriers. This may stall a thread or threads if memory operations are in progress.
The behavior of calls to this function that are within diverging branches of a thread group are undefined.
### Minimum Shader Model
This function is supported in the following shader models.
| Shader Model | Supported |
|-----------------------------------------------------------------------------|-----------|
| [Shader Model 5](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/d3d11-graphics-reference-sm5.md) and higher shader models | yes |
This function is supported in the following types of shaders:
| Vertex | Hull | Domain | Geometry | Pixel | Compute |
|--------|------|--------|----------|-------|---------|
| | | | | | x |
## See also
<dl> <dt>
[Intrinsic Functions](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/dx-graphics-hlsl-intrinsic-functions.md)
</dt> <dt>
[Shader Model 5](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/d3d11-graphics-reference-sm5.md)
</dt> </dl>
</pre>
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