<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/99220>99220</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Implement the `dot4add_i8packed` HLSL Function
</td>
</tr>
<tr>
<th>Labels</th>
<td>
metabug,
backend:DirectX,
HLSL,
backend:SPIR-V,
bot:HLSL
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
farzonl
</td>
</tr>
</table>
<pre>
- [ ] Implement `dot4add_i8packed` clang builtin,
- [ ] Link `dot4add_i8packed` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `dot4add_i8packed` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ ] Add codegen for `dot4add_i8packed` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`
- [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/dot4add_i8packed.hlsl`
- [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/dot4add_i8packed-errors.hlsl`
- [ ] Create the `int_dx_dot4add_i8packed` intrinsic in `IntrinsicsDirectX.td`
- [ ] Create the `DXILOpMapping` of `int_dx_dot4add_i8packed` to `163` in `DXIL.td`
- [ ] Create the `dot4add_i8packed.ll` and `dot4add_i8packed_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [ ] Create the `int_spv_dot4add_i8packed` intrinsic in `IntrinsicsSPIRV.td`
- [ ] In SPIRVInstructionSelector.cpp create the `dot4add_i8packed` lowering and map it to `int_spv_dot4add_i8packed` in `SPIRVInstructionSelector::selectIntrinsic`.
- [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll`
## DirectX
| DXIL Opcode | DXIL OpName | Shader Model | Shader Stages |
| ----------- | ----------- | ------------ | ------------- |
| 163 | Dot4AddI8Packed | 6.4 | () |
## SPIR-V
# [OpSDot](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpSDot):
## Description:
Signed integer dot product of *Vector 1* and *Vector 2*.
*Result Type* must be an integer type whose *Width* must be greater than
or equal to that of the components of *Vector 1* and *Vector 2*.
*Vector 1* and *Vector 2* must have the same type.
*Vector 1* and *Vector 2* must be either 32-bit integers (enabled by the
**DotProductInput4x8BitPacked** [capability](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Capability)) or vectors of
integer type (enabled by the **DotProductInput4x8Bit** or
**DotProductInputAll** [capability](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Capability)).
When *Vector 1* and *Vector 2* are scalar integer types, *Packed Vector
Format* must be specified to select how the integers are to be
interpreted as vectors.
All components of the input vectors are sign-extended to the bit width
of the result’s type. The sign-extended input vectors are then
multiplied component-wise and all components of the vector resulting
from the component-wise multiplication are added together. The resulting
value will equal the low-order N bits of the correct result R, where N
is the result width and R is computed with enough precision to avoid
overflow and underflow.
[Capability](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Capability):
**DotProduct**
[Missing before](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Unified) **version 1.6**.
<table style="width:100%;">
<colgroup>
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
<th></th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>5 + variable</p></td>
<td class="tableblock halign-left valign-top"><p>4450</p></td>
<td
class="tableblock halign-left valign-top"><p><em><id></em><br />
<em>Result Type</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#ResultId"><em>Result <id></em></a></p></td>
<td
class="tableblock halign-left valign-top"><p><em><id></em><br />
<em>Vector 1</em></p></td>
<td
class="tableblock halign-left valign-top"><p><em><id></em><br />
<em>Vector 2</em></p></td>
<td class="tableblock halign-left valign-top"><p>Optional<br />
<a href="#Packed_Vector_Format"><em>Packed Vector Format</em></a><br />
<em>Packed Vector Format</em></p></td>
</tr>
</tbody>
</table>
## Test Case(s)
### Example 1
```hlsl
//dxc dot4add_i8packed_test.hlsl -T lib_6_8 -enable-16bit-types -O0
export int fn(uint p1, uint p2, int p3) {
return dot4add_i8packed(p1, p2, p3);
}
```
## HLSL:
## Syntax
```syntax
int dot4add_i8packed(uint a, uint b, int c);
```
## Type Description
| Name | [**Template Type**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-data-types.md)| [**Component Type**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-data-types.md) | Size |
|-------|--------------------------------------------------------------------|----------------------------------------------------------------------|------|
| *ret* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md) | [**int**](../WinProg/windows-data-types) | 1 |
| *a* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md) | [**uint**](../WinProg/windows-data-types) | 1 |
| *b* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md) | [**uint**](../WinProg/windows-data-types) | 1 |
| *c* | [**scalar**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-scalar.md) | [**int**](../WinProg/windows-data-types) | 1 |
## Minimum Shader Model
This function is supported in the following shader models.
|Shader Model | Supported|
|-------------|----------|
|[Shader Model 6.4](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/hlsl-shader-model-6-4-features-for-direct3d-12.md) and higher shader models | yes |
## Shader Stages
## See also
- [**Intrinsic Functions (DirectX HLSL)**](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/../direct3dhlsl/dx-graphics-hlsl-intrinsic-functions.md)
- **See [Signed Integer Dot-Product of 4 Elements and Accumulate](../direct3dhlsl/hlsl-shader-model-6-4-features-for-direct3d-12.md#signed-integer-dot-product-of-4-elements-and-accumulate)**
</pre>
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