<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/99106>99106</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Implement the `DeviceMemoryBarrierWithGroupSync` HLSL Function
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            metabug,
            backend:DirectX,
            HLSL,
            backend:SPIR-V,
            bot:HLSL
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          farzonl
      </td>
    </tr>
</table>

<pre>
    - [ ] Implement `DeviceMemoryBarrierWithGroupSync` clang builtin,
- [ ] Link `DeviceMemoryBarrierWithGroupSync` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `DeviceMemoryBarrierWithGroupSync` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ ] Add codegen for `DeviceMemoryBarrierWithGroupSync` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp`
- [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/DeviceMemoryBarrierWithGroupSync.hlsl`
- [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/DeviceMemoryBarrierWithGroupSync-errors.hlsl`
- [ ] Create the `int_dx_DeviceMemoryBarrierWithGroupSync` intrinsic in `IntrinsicsDirectX.td`
- [ ] Create the `DXILOpMapping` of `int_dx_DeviceMemoryBarrierWithGroupSync` to  `80` in `DXIL.td`
- [ ] Create the  `DeviceMemoryBarrierWithGroupSync.ll` and `DeviceMemoryBarrierWithGroupSync_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [ ] Create the `int_spv_DeviceMemoryBarrierWithGroupSync` intrinsic in `IntrinsicsSPIRV.td`
- [ ] In SPIRVInstructionSelector.cpp create the `DeviceMemoryBarrierWithGroupSync` lowering and map  it to `int_spv_DeviceMemoryBarrierWithGroupSync` in `SPIRVInstructionSelector::selectIntrinsic`.
- [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/DeviceMemoryBarrierWithGroupSync.ll`

## DirectX

| DXIL Opcode | DXIL OpName | Shader Model | Shader Stages |
| ----------- | ----------- | ------------ | ------------- |
| 80 | Barrier | 6.0 | () |

## SPIR-V

# [OpControlBarrier](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpControlBarrier):

## Description:
  
Wait for all active invocations within the specified
[*Scope*](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Scope_-id-) to reach the current point of execution.  
  
All active [invocations](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Invocation) within *Execution* scope reach
this point of execution before any invocation proceeds beyond it.  
  
When *Execution* is **Workgroup** or larger, behavior is undefined
unless all invocations within *Execution* execute the same dynamic
instance of this instruction.  
  
If *Semantics* is not **None**, this instruction also serves as an
[**OpMemoryBarrier**](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpMemoryBarrier) instruction, and also performs
and adheres to the description and semantics of an **OpMemoryBarrier**
instruction with the same *Memory* and *Semantics* operands. This allows
atomically specifying both a control barrier and a memory barrier (that
is, without needing two instructions). If *Semantics* is **None**,
*Memory* is ignored.  
  
Before **version 1.3**, it is only valid to use this instruction with
**TessellationControl**, **GLCompute**, or **Kernel** [execution
models](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Execution_Model). There is no such restriction starting with
**version 1.3**.  
  
If used with the **TessellationControl** [execution
model](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Execution_Model), it also implicitly synchronizes the **Output**
[Storage Class](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#Storage_Class): Writes to **Output** variables
performed by any invocation executed prior to a **OpControlBarrier** are
visible to any other invocation proceeding beyond that
**OpControlBarrier**.

<table>
<colgroup>
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
<col style="width: 20%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>4</p></td>
<td class="tableblock halign-left valign-top"><p>224</p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Scope_-id-"><em>Scope &lt;id&gt;</em></a><br />
<em>Execution</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Scope_-id-"><em>Scope &lt;id&gt;</em></a><br />
<em>Memory</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#Memory_Semantics_-id-"><em>Memory Semantics
&lt;id&gt;</em></a><br />
<em>Semantics</em></p></td>
</tr>
</tbody>
</table>



## Test Case(s)

 
 ### Example 1
```hlsl
//dxc DeviceMemoryBarrierWithGroupSync_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export void fn() {
    return DeviceMemoryBarrierWithGroupSync();
}
```
## HLSL:

Blocks execution of all threads in a group until all device memory accesses have been completed and all threads in the group have reached this call.

## Syntax

``` syntax
void DeviceMemoryBarrierWithGroupSync(void);
```

## Parameters

This function has no parameters.

## Return value

This function does not return a value.

## Remarks

The behavior of calls to this function that are within diverging branches of a thread group are undefined.

### Minimum Shader Model

This function is supported in the following shader models.



| Shader Model                                                                | Supported |
|-----------------------------------------------------------------------------|-----------|
| [Shader Model 5](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/d3d11-graphics-reference-sm5.md) and higher shader models | yes       |



 

This function is supported in the following types of shaders:



| Vertex | Hull | Domain | Geometry | Pixel | Compute |
|--------|------|--------|----------|-------|---------|
|        |      |        |          |       | x       |



 

## See also

<dl> <dt>

[Intrinsic Functions](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/dx-graphics-hlsl-intrinsic-functions.md)
</dt> <dt>

[Shader Model 5](https://github.com/MicrosoftDocs/win32/blob/docs/desktop-src//direct3dhlsl/d3d11-graphics-reference-sm5.md)
</dt> </dl>
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzUWdtuIzfSfhr6hpDQoizZvtCFJFsT45_JBPEgkzuDTZbU_M0mGyRbY-XpF0W2-mApY88m3t0IhsFjHb46sMjm3qudAViQ2YrMbi94HQrrFlvu_rBGX-RWHhYjSmYrSma39L6sNJRgAiXz7Bb2SsAnKK07rLhzCtxXFYoPztbVw8EIMs-o0NzsaF4rHZQhbE2yZUftozJP_xYh-k2FAncW2utHZYJTxivhxwWZZwMWSymph5JTUYB48nRr3Vs5Bosr17jvp48PH1eJ9aY2Iihr1lxrXKUMrnqAkseVyuzGoqrOiSGshB2YHxfhrlShJ8Hdc-U6zusPzfBrbAP44BuKEUzCNjhG2GZtJXwAgzwI2zQYe8I2r8k4Rvz_FPLvcES8GnZR_Ps3sRuBc9b5s1zXDngAGgpAdsqER_n8-BaMW-9pAL1vvelWORDh93GQ32d2-_v9x8_VJ15VyuyQpN3-oAzBUtxxnXV2RaLf5_wWJxonJ-VGvmX1Y4Nv2pTMl6TRel-e-AtaLEFE2OZ1e_hq_xcN8vDL_a-_nQHl3tA4dW98cHUMzwfQIIJ1GBVUDM31Bhm0_QZOmV1EruQVpSo0nvxjqsTk8CeykemSTJc-9lolyTwbnwMSiYx-ozkXT2BkNA4V3MMrBoq8CdtgyIy6RPmW2NZNjOEfmxI2pUdrp7GrNUUnpZ8rTDG01_-Zl6n_UHAJjn6yEnR_4CHwHXgcaQiNuh99pX86MOoRus7idKNQbM_HaYywa8JujmtbpRKw7RDi_rlaWxOc1Q0ZMrsl7LoIofJoM7YhbONgp3xwh_FT4ayxfmzdrsF7hID7CiLMtVFbBXJytMW4CKUmbHrCg90g7QHc4IVTFbpMmqKUZMuvXIV4hnCtKRdB7dEH9lZwXOjj0ahMdHaUIXJHmrMVYcsHYSsgbPkeGkXajyMlRwhzsNQBF0UURNTOYdFQWWUCpkd4BlGjvOOoU_y37PQhs1VPpfcQ9r4lj8I2mBG2vDsKRtiSetQoqUGyZSiUP6MBzWFrHVBuDj070MpZASA9zeFgjaQq9FT9WsApN-VxiLDlV-uedhiGqUuto5q7HfrImuZQ8L2yDpfXRsJWmWjf2mjwPjrFGW94yStJn1Kix2iVB8NLJUi2VMYHbgSgklFl1WWungr3WySK57gJMaFEBYwNjRI_WwOphVK_JES59pZ6cHvwlHvKTeuihC0_V4O01JB5lyB8weimLyQKjvk_ylqB21pXepIt45gswEGsbhBD2YVq3OKPuCCK3NDv6ZUgPwITK9vWLIQt0xbEN57iLzC3FThupB_TLwgx19p-izIGWyrBtT40WeCAp1luQ0E5FSnz0LzJklEhWkZG7SBh16HgAcXziAQKZutADYBEWuGb7YPlCbsZ0_NeccYjYpbr6YbusTPWgez52CpFVtq0B-cRoMl42vmVCrjTGn2ge66VRHvUHk79DaVPPAlbfgHvQesYIk0W7kim1oePa1tWdej5MJbtsfN_4Aw0OzBVtamAZMsSj7p3yVht_D7G4zTC_QWdMMUd9bUoqAMfnEoq-8BdQEsNdD-BcRjTtQfZ-eArcJ1V_j-je2P8GJqqrLQSKqCvH4xAFuoPjM1Wg891qOrQxhuZrR6CdXwHdK25fxdzNQweE4N4uNOvToWUM07FonvuFM81YPQ2yQYkzQ8vD5YmdUtaOTwGgqW8TS8vS4pImDsg2XKvvMo1xPXmQG0owJ05r2KWSCdWE_3foz1u6pXpOqDoZHqXesLqdID1BqgPB1xySxj7pmQoEBGWETYjjFEE_Z-8mLDNidKhAC67nutNkOndV-skXdvahLQ9DvbmU1l9fu5X8LUO_s82piPh_OzJKPbcoDcUO7fycFYJSUX07YhOtH-urXiiBddqZ0YatiEm5Z0ZBVsRxhJ3xOcycao6eeTfQpex96JMpmtOsmXhYJu2vyh4m6VQkuldHKeEzXUg05WShM132EoCxSWpyVMrdwNXigu6au3lpn-8as2h_1_RK_F-bAuUMyqmJbSrYTAF_hV9O0pvUvk0HgcRiAO9XJsNr4xfwAe65h4Iu46nTpyMB3xagYvunnlZaaATnJ1n6S--qWXN4SefBX31sSiAD_Epjo6-UK3yx_njNR2BQelGk3muwigcKvB09Ll5RoDnyrpA91ZJujXtfXwV6w9KHYTamVcZp31oBLzy3_aV6ICIj4vH-_QKXcb3rmxYlGtNQ-GAy_jGxWnM3bQ2Qek4KaMYx6qYC4FVkKcF3wPNAQwVFlHEkzhdEgb0sPZIFOOGeIcEmepSLMvHwzeIgwn8uRk6KoPFTBqNgL0BFlzXQdMHpeX0C3e8hADOp-F4a9g2b9q04LGUrNpFQzF_TQbac13Due3SQroCNpbkaelLIiV3Ty176G60dhuhaS5VfcJYimAdc7zOSrUHt4u1iuNGFJDuWY0BGuBxfXtDHsiAYnxSRpV1OXiiOqeT8tTXFfotyKNhtxavWcjep92p6h8PAvLl89df_EV6rSDtg9fo7_wN6XWPalgv91WZnSuYdyoUdT4WtiRs80kJZ73dhlsbq-RvykwZYZtc2xzzSxqV4J-CrUbeiSbvxAfGqYzJiG3kVE4mo53jVaGEHznYggMjYOTL2bhEV4-hV6gdFrMDW0S8DuA79AbGWTOyzH7c3Cmf2W3Dy3cvdq3NfwMX4Dmy_6nW6dXz1pZcmdj8ALaE4A6x84t6bt5Fm8vmqV3b5rmxYac_3Nmu5z7DxqDZ72Dr-XXcjqkLIN7C2puA1GR6R7ERujNqtmofuOnxC9rZa9d7eNFz50LDZ_DR0ew-eVN7wkbRT3X4Hw2CU7GxjWa4kIupvJne8AtYTK7YZDK7ubpiF8Uil_PJ9URIOZmJ-XzGBJPbq5tse5lfz2E72V6oBcvYZXY1mU9uZvMJG1_Ky4m4upaX2dX1bJ7NyGUGJVd6rPW-xMvxhfK-hsXNzSSbX2ieg_bxmzJjJQSe17tYga0JY803DDJdtp-Pmpn0SfBk2fHSfZywgUyXx7Wz2wu3QCFGeb3z5DLTygffiRVU0LDoPlz_wFcgZNG660Xt9OI71m6-wERJKmf_H0QgbBNBQTMnXPYL9q8AAAD__y_FvRg">