<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/98777>98777</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Is it reasonable to elide this forward-jump?
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          workingjubilee
      </td>
    </tr>
</table>

<pre>
    consider this LLVMIR:
```llvm
source_filename = "example.1737988f50a8444b-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"

define { i1, i8 } @_ZN7example11next_back_117ha5e5b29a87ac44fdE(ptr noalias nocapture noundef align 1 dereferenceable(1) %len, ptr noalias nocapture noundef align 2 dereferenceable(2) %bits) unnamed_addr #0 {
start:
  %_3 = load i8, ptr %len, align 1, !noundef !2
  %0 = icmp ne i8 %_3, 0
  br i1 %0, label %bb2, label %bb3

bb2:                                              ; preds = %start
  %1 = add i8 %_3, -1
  store i8 %1, ptr %len, align 1
  %_6 = load i16, ptr %bits, align 2, !noundef !2
  %_5 = trunc i16 %_6 to i8
  %result = and i8 %_5, 1
  %2 = lshr i16 %_6, 1
  store i16 %2, ptr %bits, align 2
  br label %bb3

bb3: ; preds = %start, %bb2
  %_0.sroa.3.0 = phi i8 [ %result, %bb2 ], [ undef, %start ]
  %3 = insertvalue { i1, i8 } poison, i1 %0, 0
  %4 = insertvalue { i1, i8 } %3, i8 %_0.sroa.3.0, 1
  ret { i1, i8 } %4
}

attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="apple-m1" }

!llvm.module.flags = !{!0}
!llvm.ident = !{!1}

!0 = !{i32 8, !"PIC Level", i32 2}
!1 = !{!"rustc version 1.79.0 (129f3b996 2024-06-10)"}
!2 = !{}
```

Smacking this with llc will give us the following assembly:
```asm
__ZN7example11next_back_117ha5e5b29a87ac44fdE: ; @_ZN7example11next_back_117ha5e5b29a87ac44fdE
        ldrb    w8, [x0]
 cbz     w8, LBB0_2
        sub     w9, w8, #1
        strb w9, [x0]
        ldrh    w9, [x1]
        mov     x10, x1
 and     w1, w9, #0x1
        lsr     w9, w9, #1
        strh    w9, [x10]
        b       LBB0_3
LBB0_2:
LBB0_3: ; %bb3
        cmp     w8, #0
        cset    w0, ne
 ret
```

Similar story on x86.

The second jump is apparently superfluous. Specifically, this:

```asm
        b LBB0_3
LBB0_2:
LBB0_3:                                 ; %bb3
```

That could just as well be a nop. When trying to optimize for size, LLVM's refusal to arrive at the conclusion that the programmer does not want 1 additional instruction is a bit vexing. Is it reasonable to expect this jump to be elided?

The original source was [this Rust](https://godbolt.org/z/rY97ccETe):

```rust
#[inline(never)]
pub fn next_back_1(len: &mut u8, bits: &mut u16) -> Option<u8> {
    if *len == 0 {
        None
    } else {
        *len -= 1;
        let result = *bits as u8 & 1;
        *bits >>= 1;
        Some(result)
 }
}
```


</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyUV19v2zgS_zT0y0CGSMmW9OCHpGmAAt29w7bYw91LQEljmy1FCiQVO_30h6FkW3aSbmsEkaWZ-Wn-_oaW3qudQdyw1T1bPSzkEPbWbQ7WfVdm922olUZc1LZ92TTWeNWig7BXHj5__vuPT3-x7I6lDyy9Y-t0_NP6uRsfeTu4Bp-2SqORHQLLHoAJgUfZ9RqXvMiKqiy3q1SWeZ7XSbMblikTYrQO0u0wQCuD1PLFDuFsn3Qsu7OJWucsu1vnieKiZNkdF2ViMjE--0LPbqCCU70-uyFdt84T2fcak0421h85X6YzB8b_LW6VQWDFPSjOxAdQJbDiAViePv3vz2IKhnODx_BUy-b7E-fFXq5wVYtKloVs8nzbfmSi7IMDY6VW0oOxjezD4BCMHUyLW5Ba7QxwaNHhFh2aBmWtkYmSM1EBEyuNht7_KzDiDRgxwdQqePo6GCpK-yTb1gETWUoxToUL0oVzZYGsnrKYN21lC6o8-XHxanKfvjLBT94wwcUMJI0Yqul6MBgTScBkk560ageKR116rGWNOjpdi5v7bF4kEmd38Fsflt1D77D1U0Osxqgv3vIokG175WnCTyo-WHeKgr-fkVkO17Mc8vXMZKzJyUb8PItPqwgT3GAawpmgg6XCXNQc-kGPQyPNOYYVYc-dEqNPfu8uWFc6U5ijTPzE6UsF3y9TRmV6J_Mx6FjpWazp0jsrl9ly7J1-r2Ikq_tLiBdDYKuHeLe6h5i6SRTxo_CCPPazMh5deJZ6eGPEe6u8jbWctWQ6w8j_GYPedLq9Cucqxw7Dm6b5lL3iYZ5GGYJT9RDQT3NLWSzuoRt86J3dOfREDVuHxAvKaCIwYx02g_P0zb-YJjLGQZkWDkprh2FwBjrsrHthopRu1yHRLDiU7cGpgJEzDoHYhOhz62SHSW-VCeiIM7MHJoSxJtEot0wIUuqdrTHxQTbfzyqjP4n03aQ0snPS9MNZZ2JlHjWug2eC04ZZdrYdNC63Wu5OfcSJwARPLxaTrmrRhGsl_ho2nWmoTEA5jSET4t-fPsBnfEZNHlKFMgFi_hp-jc6EcIMPDTyj88oa4MuiohYWJRfVNqurag0iFXmSrhOeMlER8AxPzPHOz08rdu74l042tKnHpXxQYQ9aN7GosFPPCIOHsEfYWq3tgRSl99jV-uX16qaaxCdPv7XappH-3Y049f740a2r6XoopwE-ppd5beofcBF-vr9Pn8S1uR_qUaMijQlEZPxGK7h6Url5w8WL_QWGdPgrnc4-x-uRxxk-nt5BJBtt4wxPCCJLjzdOaO_mrlbvunrryWt36-kaMzIx7ZSdU20n0alEM0o-gdA2nmVeZOmN3GOI8hiuwUnqMPysK1WntHRxebyANXAs18u5wtc9gsfGmha-DV0PyoPse-nQBP0CfujRbfVgB7-ELz02aqsaqfULuUCNfunddzr4kqJfSs6vHBau9tlbQX_dywCNHTTF5ANIDwfUGmoECcb2S_jPHg0E9xLn1YLtg-rUDxpOB179wNjen__-g4nCg8Pt4KUmRekcjbIMcZQbaxo9RF4J--lZ5H3ZdeigtUj0H-AgTQBOJxgVlDVS06oKbmjoLmYcahXgGY_K7JbwyYMKxPfemsjywQIee2zCyC2xTsFSOKhViy3LHm9Lap3aKXrTePaHg_TUvNH-r8GHuKDLfQh9LKF4ZOJxZ9va6rC0bsfE4w8mHt1_q6JpPn6lnfNepYlfT3SZsdX9uFaYKA0-00KqztPSDzVsDczoiImSDmk0FGLdDQGG2PvxQDN7SEe0ChKWfYR_9ZQzln0YSro9n5SpNxSd0O40GuJsou30Wk6fP-15cKibigdA7fG13gSUEAxn2Y1UI9XnfKxj4o5cpj4b6HixfsPkpMOyj_HvLdgvtqPEnU5T1SS97J2fLqBFu8naKqvkAje8EGnF87QUi_2mrdJ2nWftKs-xyZq2rbHNeNXmKLO8zlYLtaEVmBY8E1nOhVii5G0jRL4u0kLmbcnyFDup9DJucet2C-X9gJuqLIpiEU-ZPv5uFcLgAaKQFunqYeE2ZJPUw86zPNXKB39BCSpo3LzZ79TYY7tvrTtI1ybU9ix7XAxOb24aV4X9UC8b2zHxGH_2jpekd_YbNoGJx-iSZ-JxdPl5I_4fAAD__8nXPro">