<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/98596>98596</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RegAlloc] Unnecessary callee saved registers are used when calling functions
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          LittleMeepo
      </td>
    </tr>
</table>

<pre>
    src code:
```
unsigned add(unsigned a, unsigned b) {
    return a + b;
}

unsigned run(unsigned x, unsigned y) {
     unsigned z = add(x, y);
     return x + z;
}
```
https://godbolt.org/z/f4P19b6jf

risc-v asm:
```
add:                                    # @add
        add a0, a0, a1
        ret
run:                                    # @run
        addi    sp, sp, -16
        sw      ra, 12(sp) # 4-byte Folded Spill
        sw      s0, 8(sp) # 4-byte Folded Spill
        mv      s0, a0
        call add
        add     a0, a0, s0
        lw      ra, 12(sp) # 4-byte Folded Reload
        lw      s0, 8(sp) # 4-byte Folded Reload
        addi    sp, sp, 16
 ret
```
aarch64 asm:
```
add: // @add
        add     w0, w1, w0
        ret
run: // @run
        stp     x29, x30, [sp, #-32]! // 16-byte Folded Spill
        str     x19, [sp, #16]                  // 8-byte Folded Spill
        mov     x29, sp
        mov     w19, w0
 bl      add
        add     w0, w0, w19
        ldr     x19, [sp, #16]                  // 8-byte Folded Reload
        ldp     x29, x30, [sp], #32             // 16-byte Folded Reload
 ret
```
It looks like the use of `s0` under risc-v target and `x19` under aarch64 target are not unnecessary. In fact, there is no need for any extra register to save the function parameters. 
And gcc generates simple asm code under aarch64 target:
```
add:
        add     w0, w0, w1
        ret
run:
        stp     x29, x30, [sp, -16]!
 mov     w2, w0
        mov     x29, sp
        bl      add
 ldp     x29, x30, [sp], 16
        add     w0, w2, w0
 ret
```



</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJysVtuOozgQ_RrzUkoEJuHywEP3RpFG2pVWs9oPMLggzDh2ZJtc-utXNjRJaNLplhZFdpCrTp1THGOYMW0jEQuyfiXrTcA6u1O6-LO1VuBfiAcVlIpfCqMrqBRHEr-QcEPCF5KEw8_fdtLjcGCcE5pdbwn9A8a7ktAcSPra5wAAaLSdlsCA0FcoSTwskXQz_LlH1528RT_foV8-oF_X3oDEm4Gcz3LBYzm4oXL2VN5mqNwr3ll7MK4ddEvotlG8VMIulW4I3b4Ruq1Xf0d5mfyqb4Xo1lSLIzCzf9RIRzHuCT25CI2BrEKXcBUB4EQCC53GYYzu1zXagUwnv1fKJUxLtW42B1eoHxdRch9kTkNd74WIEpq5yNyjrhblxSJsleDI4Z9DK8R8tvFasu8l74-3ySy8X62YEDDbPj_ftNBMMsXXJf1EoRifT3-uaS57ruljz8eHO7UV09UuWX3Beb2fHzrLXSfP-xT5MfzcXVe4D-4x9uDnM80d0jn2sGT92msiNF7ElKw3hEbvMFHy1C9W96BRPkWLErLezJnbQ2dPzaSOt3TNYX751Bce-1KKsXmfdnPoaT6xCv9f5My6kD9uv2u6LxLTOfDJY7hDf-TAHxaEUr8NiPY3gt0hdAZB1UCS0Lgw6CRHDcMr0jLdoAUmuQtw8seIdy-_h2gEqSx0UmKFxjB9WcIPCTWrrFNhd6gRWgNSgUTkUCsNTF4Az1Yz0Ni0xqIGq8CwY0-t7mRlWyXhwDTbo0VtltDreJEcmqqCBiVqZtGAafcHgW5r-SNyluXnm-4rxvh0m31rYy28cwh9hxydS-c29BPbf7T3c19NT4iJ4Hsaj_x0Owa8iHke5yzAIkppmCZZktFgV_CwrPI6rSmPVlGZsZRiyuiK15glYbWOg7agIV2FaUTDNMpCuqRlTNM8ZEleZUleR2QV4p61YinEce-O96A1psMiz9Z5EghWojD-44lSiSfwi4S611agC5ezKLvGkFUoWmPNFcW2Vvivrp_YvAihKreZ_71a2J9OiN6SfDSp8W7vDHI47VD6oFY2o19N0GlRTD5NWrvrymWl9oRuXf1hWhy0-oVuj2w9a0Potld1LOh_AQAA__9iB6dy">