<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/97312>97312</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[SPIR-V] Incorrect builtin implementation work_group_any
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:SPIR-V
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
michalpaszkowski
</td>
</tr>
</table>
<pre>
```
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v12
8:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024"
target triple = "spir64-unknown-unknown"
; Function Attrs: nounwind
define spir_kernel void @test_wg_any(ptr addrspace(1) %input, ptr addrspace(1) %output) #0 !kernel_arg_addr_space !7 !kernel_arg_access_qual !8 !kernel_arg_type !9
!kernel_arg_type_qual !10 !kernel_arg_base_type !9 !spirv.ParameterDecorations !11 {
entry:
%0 = call spir_func i64 @_Z13get_global_idj(i32 0) #1
%1 = insertelement <3 x i64> undef, i64 %0, i32 0
%2 = call spir_func i64 @_Z13get_global_idj(i32 1) #1
%3 = insertelement <3 x i64> %1, i64 %2, i32 1
%4 = call spir_func i64 @_Z13get_global_idj(i32 2) #1
%5 = insertelement <3 x i64> %3, i64 %4, i32 2
%call = extractelement <3 x i64> %5, i32 0
%conv = trunc i64 %call to i32
%idxprom = sext i32 %conv to i64
%arrayidx = getelementptr inbounds float, ptr addrspace(1) %input, i64 %idxprom
%6 = load float, ptr addrspace(1) %arrayidx, align 4
%add = add nsw i32 %conv, 1
%idxprom1 = sext i32 %add to i64
%arrayidx2 = getelementptr inbounds float, ptr addrspace(1) %input, i64 %idxprom1
%7 = load float, ptr addrspace(1) %arrayidx2, align 4
%cmp = fcmp ogt float %6, %7
%conv3 = select i1 %cmp, i32 1, i32 0
%8 = icmp ne i32 %conv3, 0
%9 = zext i1 %8 to i32
%10 = call spir_func i32 @_Z14work_group_anyi(i32 %9) #2
%call41 = icmp ne i32 %10, 0
%call4 = select i1 %call41, i32 1, i32 0
%idxprom5 = sext i32 %conv to i64
%arrayidx6 = getelementptr inbounds i32, ptr addrspace(1) %output, i64 %idxprom5
store i32 %call4, ptr addrspace(1) %arrayidx6, align 4
ret void
}
; Function Attrs: nounwind willreturn memory(none)
declare spir_func i64 @_Z13get_global_idj(i32) #1
; Function Attrs: convergent nounwind
declare spir_func i32 @_Z14work_group_anyi(i32) #2
attributes #0 = { nounwind }
attributes #1 = { nounwind willreturn memory(none) }
attributes #2 = { convergent nounwind }
!spirv.MemoryModel = !{!0}
!opencl.enable.FP_CONTRACT = !{}
!spirv.Source = !{!1}
!opencl.spir.version = !{!2}
!opencl.ocl.version = !{!3}
!opencl.used.extensions = !{!4}
!opencl.used.optional.core.features = !{!5}
!spirv.Generator = !{!6}
!0 = !{i32 2, i32 2}
!1 = !{i32 3, i32 300000}
!2 = !{i32 2, i32 0}
!3 = !{i32 3, i32 0}
!4 = !{!"cl_khr_subgroups"}
!5 = !{}
!6 = !{i16 6, i16 14}
!7 = !{i32 1, i32 1}
!8 = !{!"none", !"none"}
!9 = !{!"float*", !"int*"}
!10 = !{!"", !""}
!11 = !{!5, !5}
```
Assertion hit when compiling with SPIR-V backend:
```
SPIRVBuiltins.cpp:1058: bool llvm::generateGroupInst(const llvm::SPIRV::IncomingCall*, llvm::MachineIRBuilder&, llvm::SPIRVGlobalRegistry*): Assertion `ArgInstruction->getOpcode() == TargetOpcode::G_CONSTANT && "Only constant bool value args are supported"' failed.
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0WE1v2zoW_TX0hrAhUh-2Fl44yUvRRV-LNHiL2Ri0dC3zhSY1JGUn_fWDS8m2JDtpUGCKllLFcw8PDy-_LJyTlQZYkvSOpA8T0fidscu9LHZC1cL9ejFH9yInG1O-LUkWdX-jBxKtvLAVeFoKL5R4M42nJH6ghHOY1iReZcmlmEpG4tUC_03l4vLKMhKvumIqY07iVVdM5SB-O6jbDuoOA5YDT3rIwyDukCz6cUOWPBDwRVtOD4y33VyMPudIxtOsLaeH8-vpQ8oQcS6nBxYFTf0H5wMPvZW1gpN_rpY2S6aNftHmqE_Pc0xXxnf0sdGFl0bTlffWkXhFtWn0UeqyxZSwlRoo8q1fwGpQ9GBkSUkSeXB-fazWQr8Rvqi9paIsratFAYQvGOE5JTyVum484ff0PYBpfEDgf-KIEs7adtbCVmsMWIcIrJiPa4sCnFv_txEKaxajav9Wh7C87cqN2nMoGze8EQ4uBFigBYfZD2HFHjzYByiMFWidCwSMkvld2xBob99I3LlMsZNRGJhCKNVauW10QWWWoI_r_7C4Ar-ulNkItZblv4QvZMxp1JnCekQsEEntwHpQsAeNc-Y-pq80pPtftNElbNHwQM_TKLwHugsN_xM97Iae-Ld6UHRPDj_J6bMkfyKH35CTfkZO3JOTnOTwHksQgkTw6q0o3mdKb3lbGH0I0d6eu9FxeoPoHlaWr7U1-wB38OoD2YkD0VnSQwtrxZssXwO8gpMunFlSb0yjS0e3yogP59t5QnbCOgm9ZrLAr4wof892koQYoWSl6UBwWQYufGp37PcOA9i1E-zKCox91wn-_7CiL2v-B17w22YU-zqQbfHFVL4lDIZjADY2yqK4M0NB4alkHcllAt1IvkU7AbAJDX2_Q9L3kXlA_gpOszb0Kj3Z7XULWcPETI7Gvqwra5oatwHZzUxk7ybneFol7JZAFo3VBeyN7geKDx3oBjH9xJzqjVn2USKhKZ_YwcZ5lJ5UOW_sZTCwC59Jo-w6jSz4sP12-_f84fPbOT1KpSz4xmq6h72xuGlro4Hw_LTVF0pY-PwKPFx_PxKB1oOtcA0dHy-u2vxNcg3zqi2F91ZuGg-uO0PgIWh-d-n72akhkl0jP3DpPRZ-ZrnRTToepNNB4ltg_2ZKUN2hjeEBgrPoEsGZqUEXagZabBTMHn-s77___fy0un_ux_TwLfdP09gChrTsBi2iZwewDgdrgOY30KZQt8HxDXDjoJzBqwft2iNSPyB5L8DUmDdCzQpjYbYF4RsLo-D0ur9fQIMV3tghMrv2PuohujPEafvvsbIRKj6h4gj_9KH8PcIBKn6PcIBKhvIJ54Vav-zs2jWbMA0cHuB7Aek7WZD1m2MZDSsJvgydn49U9dbVHmpxpaqdD7zdtPofelH5VVS3fa4GkVKfPvXtj66CB0FjOBsnSIvsJcrw1tmWK4eHREzmnfT0uANNC7OvpZK6okfpd_Tnj69P03_oRhQvoMvzgX7Ehqh_7hqpvNRuVtR1uKCleNujG2MUVeqwx-B4VbV5Cl9wML9q5wlfFEY738MEuvb1qy7MXurqXigVXLrv4b6JYic1fH3CpkuwhGdDQCD6EpbsJ6ikwzsJkuQo7NJ5kkUrW6EY24RVe0rivyrw3-vClLgthZUvfkCLn8NVs6sJjXzBBenn8-rvZxoEZHj5_K7VGw39Etq3HhyEaoAKWzkalvumro31UIbRnNOtkArK2cjfSbmMyzzOxQSWbM7yRRrFaT7ZLXm2SXnM5jnb5GWWJPO8mPM44SWwYhst4olc8ogn0TxiLGM8zmdZHkdZVPBSLLacwZwkEeyFVDP0a2ZsNZHONbDM5zHjEyU2oFz4QYPzy_C3-YCS04eJXWLodNNUjiSRks67C5mXXoUfRLqQ9IHiYFqLJ5lNmytU7uv2rBFukXS4200aq5Y772vcPwl_JPyxkn7XbGaF2RP-GMa5fUxra_6FwhP-GDrhCH9s-3FY8v8FAAD___xz79M">