<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/96815>96815</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[X86] llvm.experimental.constrained.fptrunc ignores rounding for fp32 to fp16 conversion
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
ienkovich
</td>
</tr>
</table>
<pre>
**Problem**
Codegen for `llvm.experimental.constrained.fptrunc` intrinsic doesn't respect the requested rounding mode. Using different rounding modes in this intrinsic doesn't affect the resulting code.
**Details**
Here is a test IR to convert a vector with zero rounding:
```
; ModuleID = 'LLVMDialectModule'
source_filename = "LLVMDialectModule"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn
define void @type_convert(ptr %0, ptr %1) local_unnamed_addr #0 {
%3 = load <16 x float>, ptr %0, align 4
%4 = tail call <16 x half> @llvm.experimental.constrained.fptrunc.v16f16.v16f32(<16 x float> %3, metadata !"round.towardzero", metadata !"fpexcept.ignore") #2
store <16 x half> %4, ptr %1, align 2
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare <16 x half> @llvm.experimental.constrained.fptrunc.v16f16.v16f32(<16 x float>, metadata, metadata) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn }
attributes #1 = { mustprogress nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }
attributes #2 = { strictfp }
```
A command used to compile:
```
llc test.ll -mcpu=sapphirerapids
```
The produced result uses `vcvtps2phx` instruction to make a conversion:
```
type_convert:
vcvtps2phx (%rdi), %ymm0
vmovups %ymm0, (%rsi)
vzeroupper
retq
```
This code doesn't provide the requested rounding and produces incorrect results. I'd expect the resulting ASM to use explicit rounding, e.g:
```
vmovups (%rdi), %zmm0
vcvtps2ph $3, %zmm0, (%rsi)
```
</pre>
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