<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/95053>95053</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Missing Support for ARM Floating Point V5 Spec
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          haydenridd
      </td>
    </tr>
</table>

<pre>
    The Cortex M7 chip (ISA v7-EM) from ARM supports the "FPv5" floating point spec:
https://developer.arm.com/documentation/ddi0489/f/floating-point-unit/about-the-fpu

Just built llvm from tag release tag ` 18.1.7` and ran the following:
```
llvm-project/build/bin/llvm-tblgen --dump-json llvm-project/llvm/lib/Target/ARM/ARM.td -I=llvm-project/llvm/include -I=llvm-project/llvm/lib/Target/ARM > ARM_TARGETS.json
```
To verify which options were supported.

Features only go up to `vfp4`.

ARM chips are backwards compatible with previous floating point versions, so it's valid to use `vfp4` for the Cortex-M7, however it caused me a good deal of confusion when porting a project from GCC to find `vfp5` nowhere in sight!

For context this was discovered because:
- Zig uses `llvm-tblgen` to parse + populate some enums that define valid LLVM features per CPU
- I am developing with Zig + a Cortex M7 based MCU, and was confused why `vfp5` wasn't in the available CPU features
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJx8VE2PozgQ_TXOpQQiJkDnwCGT7ox6NZFa_TGHvawMLsCzxkb-gOl_vyqS7u2eHa2UAAa73qtXr0p4r3qDWLPiCytuNyKGwbp6EK8SjVNSbhorX-vnAeFoXcCfcK6gHdQEjN_cPx1grpK7M-N76Jwd4fB4Bh-nybrgIQwIjPPTw1wwzqHTVgRlepisMgH8hC3LDyy7ZdlhCGHytOInxk8SZ9R2QpcKN6atHemdbeOIJoigrKG1VNnuZs_4qaP_NXayxk6iUYHxk2hsDEkYMOmmeAG6XP-IPkATlQ6g9TxeuAfRg0ONwuP6zMoMtjfpNq3oSRgJTpg1qc5qbRdl-nf-rMyuv3VJQZPJ2R_YEg9CknRXxHz9GBrdo4EkkXGckh_eGvjlEC3pphrGT8_C9UhvD4_nyzUNEpJ7lt_-_pgyrY4S_2_LfyMDy--ohH89Hx6_3j0_pcTrtwk-W5jRqe4VlkG1A9iJyuJhQYdvBkCZftT8hCJEhx6s0a_QW4gTBEsqz920Y2X2aTexIZt5EA6hEe3fi3DSQ2vHSQTVaIRFhQEmh7Oy0f_qrhmdJ0aMH8FbIDtUHmahlSTU6PEDMnTWrYW9WDw5V3RssAvO6EAFaEX0KGFEENBbK0Gi0GA7aK3pIgHBMqABSps4CLiqfXHW1-ORQDtl5BW1IFRjl4H0Uga86ofA-PaTYNZR_IA_A4RBeViEB6l8a2d0KKHBlda7BxP4U_WUmSeQDy4jrGBhEo6y5l9gslPUIiB4OyKgiSM1qwggsVMGrzJ9-_b9DN1b1SZ0cHx4eYO6BzHCtU8p47UYhE_xxYdZ0QhS7nx8IUmpiSiLi2woYRlePyqyCG8YrwJJQvUQs1BaULGPDy_vXDayzuU-34sN1ttqe5MVJc-LzVDnbbaVIpN5Uxa4L8uyqYq2kaLYd4LvdnKjap7xXVZuM74tsrxIm1LkZVahrOQ-24qK7TIchdIpyZda12-U9xHrfZEV-UaLBrVfRyXnBhdYPzLOaXK6epW8ib1nu0wrH_y_UYIKGuuz8p7Eero0yGo7MvrpzbsPq3e_F_A0YbuJTtefB2OvwhCb60R8a-PPzb1S8oyfLpTnmv8TAAD__-q-6sU">