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<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/94116>94116</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[AMDGPU] v_pk_fmac_f16 is broken with inline constants on gfx11
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
DadSchoorse
</td>
</tr>
</table>
<pre>
I'm using LLVM version 398162ddbcf741c49e86bef2ef4aaa3fd0213916
I tested inline constant behavior of `v_pk_fma_f16` on Navi31 and Raphael. For gfx11 (and I assume all newer hardware), the fp16 inline constant is duplicated into the high bits. For gfx10.3 (and I assume all older hardware), the upper half always reads zero. LLVM seems to apply the gfx10 behavior for all generations.
Current llvm-mc assembler behavior for gfx11:
```
v_pk_fmac_f16 v0, 0x3C003C00, v1 // 0xff, 0x02, 0x00, 0x78, 0x00, 0x3c, 0x00, 0x3c
v_pk_fmac_f16 v0, 0x3C00, v1 // 0xf2, 0x02, 0x00, 0x78
```
Expected behavior according to my Navi31 tests:
```
v_pk_fmac_f16 v0, 0x3C003C00, v1 // 0xf2, 0x02, 0x00, 0x78
v_pk_fmac_f16 v0, 0x3C00, v1 // 0xff, 0x02, 0x00, 0x78, 0x00, 0x3c, 0x00, 0x00
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyslN9vpDYQx_8a8zIKss3vBx7SbLeKlFRVq_Y1MvYAbgxGtmF3-9dXsJtuc8ld7k6HwNZobH9nPh5GeK-7EbEm2U8k20ViDr119U6oP2RvrfMYNVad6nvCiwFmr8cOHh7-eoQFndd2hKQqWc6VamRbpEymFZZ5gy3HNhVCJK2inCUVywndEXp7Hu8hoA-oQI9GjwjSjj6IMUCDvVi0dWBbIDldnqbnp3YQTy3LSU7BjvCrWHTCQIwKfhdTL9DEsLcOuvbIGBBerp57EN7PA4IwBkY8oINeOHUQDgmvCL-D0CO0E8vfRKA9qHkyWopzfMFua3vd9dDo4K9qNE7e1bNGva83T9PmMC0IcxAnDw6F8vAPOhufoXrEwUOwIKbJnLZdm9QVTGvdptLhiE4EbUcf_x_t3ewcjgGMWYabQa6B4dAYdK-P2HCR5LKJ5PTybuYLdrlyh4WuCdBjckfp-q3WsqLeE74Hemzbs5_yy3xZX5Sv7US-sT9Quyitz1WNf1btvVTO48_HCeV6n_8xEFJap9ZiDhaG00tZrWXpfxCWDwL9xrS_EzKlX8DyNWOk6kRVSSUirFnBCp4VZZZEfY2ySWRBuUKVV5xVpWirpmoSiYJxXmKka055SnPKWE5TWsQlq5osUyWraNVUWUpSioPQJl5rNbaui7T3M9ZVylgeGdGg8Vtb4nzEA2xOwvnapVy91Xczd56k1Ggf_PWUoIPZ-tnt4-6X3_4k2Q5ew9YeGmefcYSDDv2nLcCvbWb7P6LZmboPYdpKYruKTod-bmJpB8L3q-Jlupmc_RtlIHy_xekJ35_zWGr-bwAAAP__mwGW7A">