<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/92609>92609</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64][X86] Suboptimal code for combining overflow flags
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AArch64,
            backend:X86,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Kmeakin
      </td>
    </tr>
</table>

<pre>
    This code performs a sequence of 3 adds and sets `w0` if none of the adds overflow.
The generated code calculates `!(add1_overflowed | add2_overflowed)`.
It would be more efficient to generate `(add1_didnt_overflow & add2_didnt_overflow)`

```rs
#[no_mangle]
pub fn checked_add3(a: u32, b: u32, c: u32) -> Option<u32> {
 a.checked_add(b)?.checked_add(c)
}
```

generated AArch64 code:
```asm
checked_add3:
        adds    w8, w0, w1
 cset    w9, hs
        adds    w1, w8, w2
        csinc   w8, w9, wzr, lo
        eor     w0, w8, #0x1
        ret
```

Optimal AArch64 code:
```asm
checked_add2:
        adds    w1, w0, w1
 cset    w0, lo
        ret

checked_add3:
        adds    w8, w0, w1
        cset    w9, lo
        adds    w1, w8, w2
 csel    w0, w9, wzr, lo
        ret
```

The generated code for x86 is similarly suboptimal:
```asm
checked_add3:
        add edi, esi
        setb    cl
        add     edi, edx
        setb al
        or      al, cl
        xor     al, 1
        ret
```
</pre>
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