<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/90418>90418</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[mlir][Vector] Add support for `i2` vector emulation
</td>
</tr>
<tr>
<th>Labels</th>
<td>
mlir,
mlir:vector
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
KoolJBlack,
banach-space
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
dcaballe
</td>
</tr>
</table>
<pre>
[We recently added support](https://github.com/llvm/llvm-project/blob/aa596fa4d974f75ed8d2db3f4880ec0e5be3e176/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp#L857) to generate fast vector sequences of instructions to "emulate" conversions from `i4` to byte+ integer and 32-bit floating point types. This issue is to track the same work for `i2` data types. We should add support for signed and unsigned extensions to byte and floating point types. The existing `i4` support should be the foundation of the implementation for `i2` (we may need to loop into that code for the `i2` case, literally). The tests added in the `i4` support can help define the cases that need to be supported for `i2`.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyUVE2TpDYM_TXmopouENDAgcPMTvqQpHKayp6FLRpnjE1sM7P971N2f6QmVTnsibLkp_ck60Eh6LNlHkX7IhB_c878-mJIvgtEgd8E4kSW5PIUNpKcgu1rQXtcnB-VpImM4WJy6pIKfGfwLNlGcwFSihWEfducj6J9FdgvMW5B1M8CTwJPZx2XfTpItwo8GfNx_zxt3v3FMgo8TcZNAk9E7XCcqVFD18xdy6pXqKZ6bvq-ZFlyO3HNVXcUeFqN9qmOTrhXTeZa6E-W0aXEmycbZufX8Ij-su6GIv9B3rvPt8vGB7ltAuvf-7YTOEB0cGbLniLDTCHCR4ZB4L93tpIDuBm0DdHvMmpnQ0IIRL7WFYggnf1gH3Jy9m4FcSx1I45lujpd0qUX0DbymT2QVVDj06QjzMZR1PYMm9M2QrxsHA7wtugAOoSdQWey6Em-Q1wYAq0Mn86_w-x8ZsHEoijSHf2dISxuNyq90P198vW8CCrz7_Z24B-Rbbh3laTm_P8JY-AfOuTMo8U7xY114qx0drtVlOaVxpciet0Mr2zjNfqlAYH9J8NKF7DMKkkxzm1pZA7iQhGkU5whqdIDJimwwG9gdGRPxlwEDleZkUMMtx3V9oH6IliShYXNBopnba-yU8VwpbwrmfiOYPVF9aFQY62GeqCCx6qrmroe2r4qlrE7UkXYd5LUTKqquO26CluJszpiSVzoEUtsygZ7rPCI1YGHSQ0dSpy5pXLuRFPyStockmMOzp-LvBDjUDZVXxia2ISbpa-WuJk5H-rnj5sfspv9mG037ecgmtLoEMO_ZaOOJv8cMrJ9Fe3LzUztKzz_Z4Meg79Z5GoB7WyxezP-tP1zS8mouat_AgAA__954o0z">