<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/89332>89332</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            target amdgcn-amd-amdhsa: cttz in BB after amdgcn.ballot leads to "Cannot select SETCC..."
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          MattPD
      </td>
    </tr>
</table>

<pre>
    The following LLVM IR:

```llvm
; reduced.ll
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
target triple = "amdgcn-amd-amdhsa"

define ptr addrspace(1) @__ockl_dm_alloc(i1 %0) {
__ockl_wfany_i32.exit:
  %1 = tail call i32 @llvm.amdgcn.ballot.i32(i1 %0)
  br label %2

2: ; preds = %__ockl_wfany_i32.exit
  %3 = tail call i32 @llvm.cttz.i32(i32 %1, i1 false)
  ret ptr addrspace(1) null
}

; Function Attrs: convergent nocallback nofree nounwind willreturn memory(none)
declare i32 @llvm.amdgcn.ballot.i32(i1) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #1

attributes #0 = { convergent nocallback nofree nounwind willreturn memory(none) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```

Compiled with:
```sh
llc -O0 reduced.ll
```

yields ICE:
```
LLVM ERROR: Cannot select: 0x8fc9e20: i32 = SETCC 0x8fc9a30, Constant:i32<0>, setne:ch
  0x8fc9a30: i32 = and # D:1 0x8fc9800, Constant:i32<1>
 0x8fc9800: i32,ch = CopyFromReg # D:1 0x8f54110, Register:i32 %8
 0x8fc9790: i32 = Register %8
    0x8fc99c0: i32 = Constant<1>
 0x8fc9d40: i32 = Constant<0>
In function: __ockl_dm_alloc
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /opt/compiler-explorer/clang-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel -O0 <source>
1.      Running pass 'CallGraph Pass Manager' on module '<source>'.
2.      Running pass 'AMDGPU DAG->DAG Pattern Instruction Selection' on function '@__ockl_dm_alloc'
. . .
```

Worth noting that the ICE occurs at -O0, https://llc.godbolt.org/z/xhG4qrYWv as well as at -O1, https://llc.godbolt.org/z/WeMvT17bb.

However, it does not occur at -O2, https://llc.godbolt.org/z/WeMvT17bb

We can see that the basic block (BB) `__ockl_wfany_i32.exit` is just terminated by an unconditional branch to the successor BB `2`. If I pretend I'm SimplifyCFG and fold these BBs myself then the ICE doesn't occur at -O0 or -O1, either, https://llc.godbolt.org/z/qTxa444sK

This is reduced LLVM IR (using llvm-reduce). For context, the original LLVM IR has been produced from the following (adding `-v -save-temps`)

```
$ cat > my_test.cpp
int main() {
  int* ptr;
  #pragma omp target
  {
    ptr = new int();
  }
}

$ CC -fopenmp -fopenmp-targets=amdgcn-amd-amdhsa -Xopenmp-target=amdgcn-amd-amdhsa -march=gfx90a my_test.cpp
LLVM ERROR: Cannot select: t26: i32 = SETCC t25, Constant:i32<0>, setne:ch
  t25: i32 = zero_extend # D:1 t2
    t2: i1,ch = CopyFromReg # D:1 t0, Register:i1 %454
      t1: i1 = Register %454
  t8: i32 = Constant<0>
In function: __ockl_dm_alloc
. . .
```

The original `llc` invocation from `-v` was `llc -O0 -mtriple=amdgcn-amd-amdhsa -disable-promote-alloca-to-lds -mcpu=gfx90a -amdgpu-dump-hsa-metadata` although only `-O0` suffices to trigger the ICE (with the IR itself already containing `target triple = "amdgcn-amd-amdhsa"`); cf. the Compiler Explorer links.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJysWFtz3CoS_jX4pUsqCWluD_MwF4_XtUnFZXs3u08uhJDEMQIdQGNPfv1Wo7nGs0nOpSqRRtB8_dH0DTPnZK2FmJPRkozWN6z3jbHzz8z7h_VNYcrd_LkRUBmlzJvUNXz69O_PcP9IsgVJ1iQ5PMfJ8E-pbbsfypZgRdlzUcZKDWOe2Vp4KJlniu1M74FkayCUiqgj2WKch0fUpecflGSLbHhEXXb-kZ-Ljc5nxucfE5It0nFCsgUdjY9PnJniDN0_o26GP2b0o6A8aNmm4wAWbWk-TG0Parb5dC8zG-8Bt0ewaHtEjLajFEdHKY22aRJw8BVtaRIg8BXpADvOo6eMRotRdJdGWpJsgXtBoRmh9MKm3spOiYM9WVvWXEesLfF_49hRfHiWopJaQOctsLK0rmNcEDpNCZ0ByZOXF8Nf1UvZvjClDCd0KlMgdJSE-clyANlLvVVM715kRmPxLv3RMQAXpIGQZ1IBZ0qBzCjio5fEA8e4QBU-lhm9UHMAKSwoVgiF4xdbQPsAOllnRen2Gx9d53QilP2AEPf-24EHDtNRSugKZAoVU06ckbLCX7ed7g-uTibriwDJlrDpNffSaFh4bx3S50Zvha2F9qAN8ikYfwVtKisEaNPrN6lLeJNKWeF7q6EVrbE7Qqfa6BOhUnDFrPgF64bzo1nyc2rX-Lid5idarhO8V8yzQok_x_HS4Htby7Zltt4TTc-JMu-tLHovXNjDcOST5V-3IhwP61JFelTx91njpOuYM8_3uDJtJ5VAur45JdmDqGuGAaU4RF-SDwn2KuZOClU6uF_dfgQcPkNSv318_IJ5HVZMa-PBCSU4xjMk79OKzwTFFDocYLaGp9vn1Wo_xbIET29ltPNM4xo8z2yVkOwWJ5zwWpBswZtDBJ3WnUEyXaLZYY0pcS8yTa5Dpwg9gJ0EByxCV7wJgCvT7TbWtI-i_g54lKdpAH4UtXRe2AEYg356ATuZXVA8iJ8LwmE7M34he-L8kW2Z_z_R5Ch6r6HaxyXKfp-Ug8zDp9vF0y24vmilBwZFX4MVnbEevIHG-w6jmdANoZta-qYvYm5aQjehUA-vqLPmNzxqupHO9cIRuglnITVXfSnANwK4Za4BjABvGRfxoP7JY0iUfdsdXSuJSTJ7sKa2rAVm674V2oeUQujGdKiFD05uI_HeKWOFxTHFdB152-tXQjeF1IEch8jgOtZ1uLr3Xe9jB9H7dBwx10Zupz17J9laai9UCAmSrZzpLRdHO6bI6LHXGvuXjjmM7cmKKXVnWdfAA458ZprVSGQCRkNryh6LKZ1coNHJftv0GuLi8_ru4V-wXtxFJLtdL-7ggXkvrIZ77bzthwT7FKIKj3RQdTjhoOxK5Z0MGmOIIf5BjH811jegjUdGvmE-HNr96hYM5711wDxaBz3-0imU4nFtysIoHxvMu5tvhG7em7v8d_vfr1tgDt6EUvgOEOmvQnwVn7fP6aQo4nOe_zBvYot2XoH0UBrhkPRAclBA_7CCCzsI4EyDE-JkhYI5yaFQhr8CodPlMqThcXK9VxgnIB381jsPXthWauZFCcUOmIZec6NLiefFFBSWad5gnKEW13MunDMWlktEp2ScxHBfwT12KF7oEu4JnbTwJNtOyWq32tyFKKuMKhHBCVguHbQ7J1SFA_p4hmgndJgLQyVg7OFAhPTNYNVfsdzvz-8sz3P3z3PLPTfS4c73JeXQ6KPFeodeFVLFMEvoLIaNsVh6vXj3qBi5GitriaY5LG6Yg0IIDZ01A2xlTRtkT1cKQqesLMOvcRJtIXJsKyIv2s6hlx86iOveT3PgDO8Rt9DuXrxwPuZdN0xK7aFlmEqmF40rgNSe0AX2cCRbntrDrLOsbhmYtoOhrz7OndZCaP0wa2vxNiAh_DnQscR_1wTSHFYriCrTCd12xx_RoMuRbP2hcYfoPxdC12VaZnlDsnVdvc8S9tESPynwno4_lnZPR3-wqOOKM5hvwpoX8R5c_1R9PT0Z0ocmHtvSH1ds_6FUh3tCPspPWAA-HdA-FOozOT_9W8ruz9Lx83kwhGsxD4lFbw1nId2HOAj-jhNvzO3FQmBH7XCdu37YpXTYZWLZbo0XUeDFIm8ibPOilnf9yRVwVd31EdboqHEsaoVneAFHtUz5xvR1A0arXWDzBXcCrq8qyYULuc3Kuhb2mIsInWJvOnw_gvQhXTFlBSt3ISEwqffB_Ot30yHOsyXwKg7Q-0bYwu2-RwAl9auLb8p5Vs6yGbsR83SSZvmU5rP8ppnnNBkLyti4YpNklk_yZILFQZSjqpgInt_IOU1onuTplGY0zbK44rzIJoIlWTqtioyTPBEtkyoOlxNj65vQDs2nsyyjN-EW6sLfSSgNkY-TyH20vrHzkB2LvnZ4uZHOuxOKl16J-d4WH3eP90Dvv4HUWDlYhU57cXsDJVgZzoJQehG7Q6TGcUwovemtmv_5hi9s8n8BAAD__53JX-U">