<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/87497>87497</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] Add SimplifyDemandedVectorEltsForTargetNode support for AArch64ISD::DUPLANE nodes
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            good first issue,
            backend:AArch64
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    Noticed on #86284 - aarch64 is missing SimplifyDemandedVectorElts handling to/from AArch64ISD::DUPLANE nodes

- [ ] Extend performDUPCombine to call SimplifyDemandedVectorElts from AArch64ISD::DUPLANE nodes as we only demand that one lane element.
- [ ] Add AArch64TargetLowering::SimplifyDemandedVectorEltsForTargetNode to handle AArch64ISD::DUPLANE nodes (and AArch64ISD::DUP?) - if we only demand the dup lane index we might be able to remove the node entirely.
- [ ] The hadd-combine.ll tests might be enough, but we could require some additional test coverage.
</pre>
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