<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/86229>86229</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [DirectX][DXIL] Align TableGen DXIL Op type spec with that of LLVM Intrinsic
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:DirectX
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            bharadwajy
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          bharadwajy
      </td>
    </tr>
</table>

<pre>
    **Problem Description**

Consider an HLSL intrinsic with `void` return type, such as `void barrier(mask)`. Its TableGen specification would be
```
  def int_dx_barrier  : Intrinsic<[], [llvm_i32_ty], [IntrNoDuplicate, IntrWillReturn]>;
```
The specification of DXIL Op that maps to it would be
```
  def Barrier : DXILOpMapping<80, barrier, int_dx_barrier,
                          "Inserts a memory barrier in the shader",
                          [llvm_void_ty, llvm_i32_ty]>;
```
There should be no need to specify overriding types for the DXIL Op `Barrier`, as its types are the same as those of the LLVM Intrinsic it matches to. Such a need arises because the current implementation in `DXIL.td` represents return types and parameter types as a single combined list with an assumption that return type at index `0` of the list. The specification of return and parameter types needs to be separated as is done in LLVM Intrinsic specification. As a result, the type specification will be uniform across LLVM Intrinsic and DXIL Op. Consequently, DXIL Op type specification can inherit types from LLVM Intrinsic and can be specified more succinctly.

Changes to `DXILEmitter` to handle the separate specification of return and parameter types also need to be made.
</pre>
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