<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/86103>86103</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISCV][MC][xthead] Wrong AsmParser error for `th.ldia`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:RISC-V
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          fpetrogalli
      </td>
    </tr>
</table>

<pre>
    Maybe I am missing something from the specs [1], but I think that the first assembly instruction  in the test `llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s` should be reporting an error at column 10 (for `0(a0)`) and not column 23 (the first immediate operand, `0`):

```
th.ldia         0(a0), (a1), 0, 0  # CHECK: :[[@LINE]]:23: error: invalid operand for instruction
```

[1] Quoting https://github.com/T-head-Semi/thead-extension-spec/blob/master/xtheadmemidx/ldia.adoc

```
Mnemonic
th.ldia rd, (rs1), imm5, imm2
```
</pre>
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