<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/85728>85728</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            O3 optimization level(clang 18) causes instruction disorder
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            clang
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          xukang919
      </td>
    </tr>
</table>

<pre>
    **When I use `risc-v rv32gc clang 18.1.0` compiler to compile the example.c, the instruction in output.s is disordered.** 

All compilation options are `-g -o output.s -S -target riscv32-unknown-elf -march=rv32gc -mabi=ilp32d --gcc-toolchain=/opt/compiler-explorer/riscv32/gcc-10.2.0/riscv32-unknown-elf -fcolor-diagnostics -fno-crash-diagnostics -O3 example.c`

 example.c:
```c
#define SET_FLOAT_ROUNDING_MODE(reg)      ({      \
        asm ("fsrm %0" : : "r"(reg));              \
})

float add_f32_f32_test(float X,  float Y) { 
    volatile unsigned int reg = 0x4;
    SET_FLOAT_ROUNDING_MODE(reg);
    return X + Y;
}
```
And the output.s is as follow:
```c
add_f32_f32_test:                       # @add_f32_f32_test
        addi    sp, sp, -16
        li      a0, 4
        sw      a0, 12(sp)
        lw      a0, 12(sp)
        fadd.s  fa0, fa0, fa1
        fsrm    a0
        addi    sp, sp, 16
        ret
```
**Obviously, the `fsrm`  instruction should not follow `fadd.s ` instruction.**

But, when I use the O0 optimization level,the `fsrm`  instruction's order is true.

All compilation options are `-g -o output.s -S -target riscv32-unknown-elf -march=rv32gc -mabi=ilp32d --gcc-toolchain=/opt/compiler-explorer/riscv32/gcc-10.2.0/riscv32-unknown-elf -fcolor-diagnostics -fno-crash-diagnostics -O0 example.c `

And the output.s is as follow:
```c
add_f32_f32_test:                       # @add_f32_f32_test
        addi    sp, sp, -32
        sw      ra, 28(sp)                      # 4-byte Folded Spill
        sw      s0, 24(sp)                      # 4-byte Folded Spill
        addi    s0, sp, 32
        fsw     fa0, -12(s0)
        fsw     fa1, -16(s0)
        li      a0, 4
        sw      a0, -20(s0)
        lw      a0, -20(s0)
        fsrm    a0
        flw     fa5, -12(s0)
        flw     fa4, -16(s0)
        fadd.s  fa0, fa5, fa4
        lw      ra, 28(sp)                      # 4-byte Folded Reload
        lw      s0, 24(sp)                      # 4-byte Folded Reload
        addi    sp, sp, 32
        ret
```

So, is there a bug in clang-18？ or are there grammar issues in example.c ? 
</pre>
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