<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/84577>84577</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
ODR warning in ARMGenInstrInfo.inc (ARMInstrTable), Arch64GenAsmMatcher.in (SubtargetFeatureBits), MachineScheduler.h (GenericSchedulerBase)
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
thesamesam
</td>
</tr>
</table>
<pre>
When building with `-flto -Werror=odr` to find possible runtime issues w/ LTO:
```
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: error: type ‘struct ARMInstrTable’ violates the C++ One Definition Rule [-Werror=odr]
5830 | struct ARMInstrTable {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:73: note: a different type is defined in another translation unit
73 | struct ARMInstrTable {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5831: note: the first difference of corresponding definitions is field ‘Insts’
5831 | MCInstrDesc Insts[4465];
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:74: note: a field of same name but different type is defined in another translation unit
74 | MCInstrDesc Insts[4445];
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: note: array types have different bounds
5830 | struct ARMInstrTable {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:78: error: ‘ARMDescs’ violates the C++ One Definition Rule [-Werror=odr]
78 | extern const ARMInstrTable ARMDescs;
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: type ‘const struct ARMInstrTable’ itself violates the C++ One Definition Rule
5848 | extern const ARMInstrTable ARMDescs = {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: ‘ARMDescs’ was previously declared here
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:272: error: type ‘SubtargetFeatureBits’ violates the C++ One Definition Rule [-Werror=odr]
272 | enum SubtargetFeatureBits : uint8_t {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:49: note: an enum with different value name is defined in another translation unit
49 | enum SubtargetFeatureBits : uint8_t {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:273: note: name ‘Feature_HasV8_0aBit’ differs from name ‘Feature_HasV5Bit’ defined in another translation unit
273 | Feature_HasV8_0aBit = 103,
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:50: note: mismatching definition
50 | Feature_HasV5Bit = 2,
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: error: virtual table of type ‘struct GenericSchedulerBase’ violates one definition rule [-Werror=odr]
1067 | class GenericSchedulerBase : public MachineSchedStrategy {
|
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: note: the conflicting type defined in another translation unit
1067 | class GenericSchedulerBase : public MachineSchedStrategy {
|
<built-in>: note: virtual method ‘__cxa_pure_virtual’
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:257: note: ought to match virtual method ‘scheduleTree’ but does not
257 | virtual void scheduleTree(unsigned SubtreeID) {}
|
```
Originally reported downstream in Gentoo at https://bugs.gentoo.org/926529.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzUmF1vozgXxz-Nc3PUiBgIcJGLvAydkZ6qjzrVzmVk4BC8a-zINknz7Vc2aRJmM1V3t53tVC1NwG__H38fH5sZwzcScUbiBYlXI9bZRumZbdCw1v2NClUdZt8alFB0XFRcbmDPbQNkGtzUwiq4-YZaK03Clao0mQZgFdRcVrBVxvBCIOhOWt4icGM6NLAnNIf_Pd6TcE6CFQnmZBocf_uvNN8xTWhu2y2h-VZpyzZIaG4O5qbCHQpCcyF27c0kHU_GAaH5Xuk_jjfXfpg3rODrp3S6Dun4KZ26Z7wgNH9keoOW0Hz-cNdfb1F-kcbqL7JWYy5LEs7jNAxIOIejrjnYwxaBfKIkDUiWGqu70sL84c5XfGSFwOeHGey4EsyiAdsgLAldELqAe4mwwppLbrmS8NAJBBIvhujiVa8fXP9AkiVc6wlIsjiW8z-u3Ftw-yEi0_6faYO6v3P6Oi63WxLOk9ABksqi-8-g4nWNGqXtoXEDldONFXAJTCrboAarmTSCeRad5PakJwl_uu638cvkkoJ78zXXxp5olAiqhlJpjWarpJ9F1ckPxmGqOYrqbDLXhzm56myMiRcOcLf0o1ihKaEvGy-iaBo7F4UfyiDR0CC9TlWDCzAg3aXo7L_1TfQilugdsbxhvDlB0podPAcDDdvhBZxCdbIyv2KcSAcR9eTz-cOde1nmTQMoQJJ6wfhkUUsolTTf4zl1_IFtEaWDsDJYhXpNL69F3BoU9auJnmwVvZoekHD1oSPzEOELttszA1uNO646Iw5QYSmYxgoa1Pgz1cx12Uyj86dblHPT3jFbNqiPsmhCX8hPvnaF9c3lyGynccHtG08vmtDeILJr4Vp34EbVcWnTtf2P7fEZn9hGyfOna0CjbBB_Za_M57nn2LtjojuuWH9zeYqyXwbXK_03yPo8kpP9jrrWn5n5LV0HbMHt2X09TQO1Vu0L9eJhpdejpscMEuDKMHywmgQhocuPbsh4kBC03LTu8TBtPGmIgyua42fB9J3kEppzWYquwvONparwFp22O-aGi1_LBqtOoB43JJxPgmkyCFw7rm3HBFi_qKj6-k7rFiVqXp7aWjBzbcOlJF7QAf1yEHNj8SxKwYy52oefltuuELyESz1frWYWN4d3TLH-KdnLLUipZC14aZ1rPNfXz6P3hRMu3UyxN1yS8NPlqJ_t0KJt1MVmaL0un9h666x9LPLdzuin86bxALfqNo0Fq8BP0x_qMMc2HjVeGNhvfxQa19opjsXJcU4_t7VTvIJBAzTtpD-9qfyiohG_rAjNPPhk9QP23x21-Ou95hsumRAH0OjYYQWV2rtcClnr7HKL0ioFzEJj7daQ0BEnNC-6jRlv_MOx0htC84xOY5qNR9UsrLIwYyOcTZIgy8JplNJRM8swqcOkmCR1RJNkGiCN6iKtkbI0nGKajfiMBjQKwiCllE4oHWOQTsI0ToMK63gSI4kCbBkXY_emXK8jf640S6M4SUaCFSiMP86iVOK-P3QilJJ4NdIz7wE3ahIFghtrzq1YbgXO7lcPsGdauknDJVxJK4HQdJhv04zQJVxfLl3pqwlZX-mv5nIVrgY8mo06LWbDF7DhtumKcanai-2Z07jV6ncs3XrTn7oRmntAfwYAAP__tMA3Kg">