<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/84316>84316</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[PowerPC] llvm generates NaN in __fixunsdfdi for PPC-32 e500mc
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
Long5hot
</td>
</tr>
</table>
<pre>
Set FPSCR register value accordingly
(1) FP invalid exc. enable
(2) FP overflow exc. enable
(3) FP underflow exc. enable
(4) FP divide by zero exc. enable
Below test calls __fixunsdfdi from compiler-rt while typecasting from double to unsigned long long.
```
void testIntrinsic (unsigned int fpErrorOptions) {
double d = 2147483456.000000;
uint64_t ui64_var = (uint64_t)(d);
kprintf("Double = %f, uint64_t = %16.16X sizeof(uint64_t)=%d\n", d, ui64_var, sizeof(uint64_t));
d= 2147483712.000000;
kprintf("Converting to uint64_t...\n");
ui64_var = (uint64_t)(d);
kprintf("Converted to uint64_t...\n");
kprintf("Double = %f, uint64_t = %16.16X count=%d\n", d, ui64_var);
}
```
```
long long unsigned __fixunsdfdi(double a) {
if (a <= 0.0)
return 0;
unsigned int high = a / 4294967296.f;
unsigned int low = a - (double)high * 4294967296.f;
return ((long long unsigned int)high << 32) | low;
}
```
**llvm generates NaN for input **2147483712.000000** on PowerPC-32 e500mc and GNU does not for the same compiler-rt __fixunsdfdi .**
`clang --target=ppc32 -mcpu=e500mc -mlong-double-64 -mno-spe`
Assembly generated by llvm for __fixunsdfdi
```
.text
.file "llvm-fixunsdfdi.c"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function __fixunsdfdi
.LCPI0_0:
.long 0x00000000 # float 0
.LCPI0_1:
.long 0x4f800000 # float 4.2949673E+9
.LCPI0_2:
.long 0x4f000000 # float 2.14748365E+9
.LCPI0_3:
.long 0x59800000 # float 4.50359963E+15
.text
.globl __fixunsdfdi
.p2align 4
.type __fixunsdfdi,@function
__fixunsdfdi: # @__fixunsdfdi
.Lfunc_begin0:
# %bb.0:
stwu 1, -80(1)
stw 31, 76(1)
mr 31, 1
stfd 1, 56(31)
lfd 0, 56(31)
lis 3, .LCPI0_0@ha
lfs 1, .LCPI0_0@l(3)
fcmpu 7, 0, 1
mfcr 3 # cr7
rotlwi 3, 3, 28
stw 3, 20(31)
mfcr 3 # cr7
lwz 4, 20(31)
rotlwi 4, 4, 4
mtcrf 1, 4 # cr7
clrlwi 4, 3, 31
mfcr 3 # cr7
rlwinm 3, 3, 30, 31, 31
or 3, 3, 4
cmplwi 3, 0
bne 0, .LBB0_2
b .LBB0_1
.LBB0_1:
li 3, 0
stw 3, 68(31)
stw 3, 64(31)
b .LBB0_3
.LBB0_2:
lfd 0, 56(31)
lis 3, .LCPI0_1@ha
lfs 2, .LCPI0_1@l(3)
fdiv 0, 0, 2
lis 3, .LCPI0_2@ha
lfs 1, .LCPI0_2@l(3)
fsub 3, 0, 1
fctiwz 3, 3
addi 3, 31, 36
stfiwx 3, 0, 3
fctiwz 3, 0
addi 3, 31, 32
stfiwx 3, 0, 3
fcmpu 0, 0, 1
lwz 3, 36(31)
xoris 4, 3, 32768
lwz 3, 32(31)
isellt 3, 3, 4
stw 3, 52(31)
lfd 3, 56(31)
lwz 3, 52(31)
lis 4, 17200
stw 4, 40(31)
stw 3, 44(31)
lfd 0, 40(31)
lis 3, .LCPI0_3@ha
lfs 4, .LCPI0_3@l(3)
fsub 0, 0, 4
fneg 0, 0
fmadd 0, 0, 2, 3
fsub 2, 0, 1
fctiwz 2, 2
addi 3, 31, 28
stfiwx 2, 0, 3
fctiwz 2, 0
addi 3, 31, 24
stfiwx 2, 0, 3
fcmpu 0, 0, 1
lwz 3, 28(31)
xoris 4, 3, 32768
lwz 3, 24(31)
isellt 3, 3, 4
stw 3, 48(31)
lwz 3, 52(31)
lwz 4, 48(31)
stw 4, 68(31)
stw 3, 64(31)
b .LBB0_3
.LBB0_3:
lwz 3, 64(31)
lwz 4, 68(31)
lwz 31, 76(1)
addi 1, 1, 80
blr
.Lfunc_end0:
.size __fixunsdfdi, .Lfunc_end0-.Lfunc_begin0
# -- End function
.ident "clang version 17.0.6.1"
.section ".note.GNU-stack","",@progbits
.addrsig
```
Assembly Generated by GNU for the same __fixunsdfdi
```
.p2align 4,,15
.globl __fixunsdfdi
.type __fixunsdfdi, @function
__fixunsdfdi:
lis 9,.LC1@ha
lfs 0,.LC1@l(9)
fcmpu 7,1,0
cror 30,28,30
beq- 7,.L7
lis 9,.LC3@ha
stwu 1,-32(1)
lfs 0,.LC3@l(9)
lis 9,.LC5@ha
lfs 12,.LC5@l(9)
fmul 0,1,0
fcmpu 7,0,12
cror 30,29,30
beq- 7,.L3
fctiwz 0,0
addi 10,1,28
lfs 12,.LC5@l(9)
stfiwx 0,0,10
lis 10,0x4330
stw 10,8(1)
lis 10,.LC7@ha
lfs 0,.LC7@l(10)
lis 10,.LC9@ha
lwz 3,28(1)
lfs 11,.LC9@l(10)
stw 3,12(1)
lfd 10,8(1)
fsub 0,10,0
fneg 0,0
fmadd 1,0,11,1
fcmpu 7,1,12
cror 30,29,30
beq- 7,.L5
.L13:
fctiwz 1,1
addi 9,1,20
stfiwx 1,0,9
lwz 4,20(1)
addi 1,1,32
blr
.p2align 4,,15
.L3:
fsub 0,0,12
addi 10,1,24
lfs 12,.LC5@l(9)
fctiwz 0,0
stfiwx 0,0,10
lis 10,0x4330
stw 10,8(1)
lis 10,.LC7@ha
lfs 0,.LC7@l(10)
lis 10,.LC9@ha
lwz 3,24(1)
lfs 11,.LC9@l(10)
addis 3,3,0x8000
stw 3,12(1)
lfd 10,8(1)
fsub 0,10,0
fneg 0,0
fmadd 1,0,11,1
fcmpu 7,1,12
cror 30,29,30
bne+ 7,.L13
.L5:
fsub 1,1,12
addi 9,1,16
fctiwz 1,1
stfiwx 1,0,9
lwz 4,16(1)
addi 1,1,32
addis 4,4,0x8000
blr
.p2align 4,,15
.L7:
li 3,0
li 4,0
blr
.size __fixunsdfdi,.-__fixunsdfdi
.section .rodata.cst4,"aM",@progbits,4
.align 2
.LC1:
.long 0
.LC3:
.long 796917760
.LC5:
.long 1325400064
.LC7:
.long 1501560832
.LC9:
.long 1333788672
.ident "GCC: (Wind River VxWorks GCC 8.3.0.5 - 2022.02.07) 8.3.0"
.gnu_attribute 4, 9
.section .note.GNU-stack,"",@progbits
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzcWtty2zjSfhr6posssMGDeOGLmI5TU5U_v2umZmfvXBQJythQoBYEJcdPvwXwfJKVzNWuKkOPicbXp6-bDdFJVfGDYOze8h8s__EuqdVrKe-_luLgv5bqbl9mP-7_YAqenv-IfwfJDrxSTMI5KWoGSZqWMuPiUPywyKNFPoGFO9fCCACenoGLc1LwDNhb6gATyb5g0Mrpj4U77GXLM5N5UV7GwgMm7eVqkW0KtqBeL5zxM88Y7H_AO5PlckdzfWAaTrFKQZoURQUvLzl_q0WV5RmHXJZHSMvjiRdM2lLB5ZUXDNSPE0uTSnFxaESystb-qRJqYWKaQVGKg7k4Y3VWQNp_5tdzyTOj_DehJBcVT7UPPQYXCvLTZylL-f8nxUtRae-s8GEMqR1v9Wdg0UdA1wu9HfX8wCHmY9GHQbTmQgXei4KaB97LOZFmj9baLlgYWbjL9I9-3_eT5ELlFu4sxMdGWbPNzy2MB9D2phs4bvBPqPg7K_MZNn200M8sPxYWot6cNQiNNfr_V7eNzdEejzwNXVx4OrE4LsWZSZMunaIW1XGc3opoFqPbQwOwqotlN6j6xbCmZS3Uh3Ec9Fjh4yr7Vm_2vB2oPC4J7X9jaDLhIgDPdagSsGiszSUO0Tb0QZJM1VLAmIwTnr_yw6vxMwELn8DDyIuCEKPAybe26MptdtjQ22Vh1EDhpw2Q1hIT9d2Ku1yoHkT7EgPFxtdYq7w1rKj_FcX5CAcmmEwUq-Bb8g3yUgIXp1pBI7IksbkNpYDn8sLkc2xTBOYTckwhERl8-fYnZCWrQJTKoKlXBlVyZJNONeljToM5S3taJOIAtq0SeWCaUKdTShHsY3qqLfrYqrSPOjx2E1078MA-itKuTmzmMHyqKnbcFz96fzPdfE0EtJUTFm3zb9TOAcBR7E21t5xc917d5VGD2gOck-oSmG6sWKo7JjiyzBKVOGmlPAtjCzH5v6ZgLI-cZHnYc1VZGHuz_SdMCn4Q3e-mwsgbAQsp2DY8sAMXkNei0bJ0zvkaP_9GXohF5y4ZtpE30n5g9aPV5EWZKCATPHcTz8t3N-F5TlMV9LOFD9EEHAfwBhUM7m12otMQOfCXwHTDao3vR63dYxN9Qv0oCoyNrr_Nie7WoSj3BaykYZHIeZ71s3zW4TQzusw20pN1-mk9FMvAWB5ZI4bGftlrAg3sMOLo7_fOkjGVutTgagLaO9IOWa1EpS5AzVIYTFfaz1E2Pxshdw6cZw2wr3fT0fYiz4CsrrSfgldAtUBPdI-8JjOZvGrgRzJFO9FNJfP0eKohNEW2YugxTyVQE9NUhtM1WariwqExxlxwt4hfu0BmvrS4NyVzobi4vIO3CjuzzAi1l6lbKpV5EyFvXUdayAGi8fBnQlNcuDiOIkNJC7ECVMqR4MzQ9HgaYkyma3vBzE_SJPrhQfeRqUR72-0KoPllTvOCr-L32Qt2szAPK956AjrFdKwYl4o3uT4nubtBcpzJbJA84-dGkbng9YLCGwoKl7ryqt53cVwWUp4qfnnvEj1ZSrKM9xTT16APc84vbyNMuo1JPsDEmzF1PyBbbhS9D_OMvZWSV-NywTDYbW3GddrwihWFgpVy6Bnnb2zVVKJX22anfIFQdHa7IZKVGmgayEar6Q3zNkqh5_gWwpx-dIN-3kxmjX5D3mZ9JBfs0K1OF45Jlk1qY8QJg4kfUBpXSmpOv_7B0NIPP6A03kBp9G7GvI3SOG9zP0Np3Ej_DZT25no_ZOxIwFtF6Gm7aN1z2v5UBx9Nk71xWwC9cVsmGITVCcpkuh2bMIbd_LlXyMlAx0S2MuxX_H0xXsJohz0dB5vN7Rnjs8hgOof2sDxjQpmjUHOIOzNZ6XOIGzrECRx3OA_1B6H2YyE6olTM-fLtT7tSSfq9PQ3p6_xY1EIkWSYrfrh22jXX_gT4ZXwC1OfVyTH1106C3RzfnOLixamgOQKsnAA6ATPpwyIZHw37o_YcWRg7X-OtKYAMy7orRlemXM2oLtup1KOX3qxLP6ZznrF_22aP83U-gA4mTbp1f16wzRNu7WHQG0s3jR2h-2N0M4PgsLDh6rEujI6xp4swGAFcxiG6Hof1bk2WmpoS7syYnwtu86Tt66QzlyzDZDSQN4_Obdb9zSzu1vPQ7XW-xuF1UoWtfS65ihKtobQ9EjeM0FFwh-0bWrpW7W5RKrvmaT8WuCtZ6qeC1aHA7QLvmjReKSh39vi_nVB-18nd0bOlpdWKWkOrqGPVIueGL53ZG88jJKtx6p85-j86P0d1T5zuxlZP1BUyfxL1GSArkZrVifcrdbJdhf87FeT9nQrSQW5mbGqc3ZG1MX-txv4bi0swCx_a8nL78c1f56W7oWRSaG7wYWHeVnvu-ldlV2uvSZ5nviheT95PVGe49d3HojLM3k1FzXS5GGkc-8oU9He_F29cws6VePML6V5i-8vfMAoiNwyDQXbJj0bWpeh7hJDA60WXQexgXZ-4fkB2dLAy2sSlNNztgnD--mAYsL_EsUXNi-i_uMjgd35mEv7x9lcpv1fwJY5h51CHOD7YgATRIeiQ0MKoub98MXEQ9UuilOT7WrHmbBJt5Wg-qF-Z0leH57vsnmYRjZI7du-GJNq5PsXw7vU-QkzTJPeon3l5FiQ6DHnI8pRinme5d8fvkaBHKAld9Fw_cvx9mAXMZX6QRQGi7qbsmPDCKYrz0Snl4Y5XVc3udx51g7si2bOiMn9YgCjYBcyiNt1_vJP35v3Nvj5UulvySlUDiuKqMH-R0L78svxHWHmLxsXsTX0p4Xn8quyulsX9q1KnSqcenyx8OnD1Wu-dtDxa-KQx2x_2SZb_Yqmy8MmYWVn4ZNz4TwAAAP__AOEgXw">