<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/82908>82908</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            LLVM MCA claims Skylake can issue 6 instructions per clock
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          SeeSpring
      </td>
    </tr>
</table>

<pre>
    ```
.att_syntax
.loop:
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        incq    %rax
        cmpq    $999, %rax
        jne     .loop
```
[Godbolt](https://godbolt.org/#z:OYLghAFBqd5QCxAYwPYBMCmBRdBLAF1QCcAaPECAMzwBtMA7AQwFtMQByARg9KtQYEAysib0QXACx8BBAKoBnTAAUAHpwAMvAFYTStJg1CGxATwV4FpJfWQE8Ayo3QBhVLQCuLBnucAZPAZMADkvACNMYj0AB1QLewE3T28YuMIHBgCg0JYIqK5rTFsEhiECJmICJK8fAptMOwyyioIskPDIvQVyyuqUup7WwPbczq4ASmtUD2Jkdg4AOiYCAgB9BVNBJlUAUg0AQQXaVFRokD39vYBOBlOL69vo%2B40bu4OHt8uXx%2BfXp/fvp8Pv8vn9fj8AWDIRDQTDgeCgYCQddAsgAI7XHYAJgArMRtr9kCxohiXgASK6U0gAamxeIJkO0QWuRxO0Q4k1onBxvB8HC0pFQnH2zFo5ks1IU01mmFpWIAzDxSARNBzJgBrEA4jT6TiSXmqwWcXgKEA6lX8jmkOCwJBoYl0SLkSj26KOqK0WgANxYAFoWKICMQPAx1Xw6ARIqaIGFDWFAhVTJwlfHmMRTAB5MLaBoWpX2tiCDMMMWGrBhDzAFxiWim7i8LAsQzAcSW0j4Yi5vBezB1gWYVQNDyR5O8QKRrlt2h4ML49NuLCGoN4FijyZUAzABQANTwmAA7hnooxRzJBCIxOwpGf5Eo1IbdAUDEYQCYxRYrNOwqbIJNTiU639ZBog8HZ5QAEQUdVTAMdVMF4VAe2IYg8CwH8IEmepGkcCBnD6WpSH8YYcjyVJ4gyfCyPSAQ2hIsZCmKJpBkouoii7ARmkqWiOnyaxmPcGoukGbjRnyTDpTmCROW5A02yFDhqU9H0gKYakICDEN1XGNTcEIEg5UVcZeAtLRxg1LUdUnfVSFXLgNB1PkBXkk0zWVVUzN1DgsVkpzjTcy0PKQixHEkIA)

UICA predicts 4.50 cycles per iteration due to an issue bottleneck; MCA claims 3.2

According to Agner,
> The maximum throughput from the decoders is four instructions or five μops per clock cycle

Similar problem with Icelake, again from Agner
> The maximum throughput is improved to five instructions per clock cycle, where Skylake has four.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzUlVuzqjoSxz8N64U6qzCCwoMPHS6KioqiyHqZQoghcglyEfDTT7lce2afXTU1z6eKAtIh3b9_N0mHdc1oQchMULCgGB9h2yS8mh0IOZQVK-jHhcfDTJhIP5dkCBJ8hk3zr3oomrD_MWScl8IY3iNB0gpe_qPfWRHdBUkTkFL90ihIWpSXb6usaZqAdPGP-VtBBEl7J-Nt-3veBAXPeXzhWSMohoDUpGnK-pU2ZAnIou-pT17Rb8P4KYxhG6xpAha-x4qr9xB0uwA7eo73MV6DNXL1CMKdqYPz7HDjwBTczmocFw-wp9qqcQMThppdJPcMeq9iDCuOCw_gCIuyA-cBVuAdmiUd6fMevO4kW-Xy6rumCgMfuzg5rV29XeOijeBrB18OGOkD9I0T3CTAI3dNOnPsITVoHXuBqU6lZWDfV0rlWbWZMFNf5ra-XKlXKBtn2w0D43ad7gz74Z6Gob0f23Lqd7tL9LzLcMibo4GWaUxl2LJAB4o1fNrgZXaEI5XAdc_hydrz1BhrjwBvcbZdT7QHF5CCsCxdWnm7aNT23H8brudSQNb1Uaq7h_ootOtNBd-w94brGZToNNDdOIaagj09LwJYUqicfVNpqd7zhJ0pHFaTo0QhzHtiL9Ot5Prtvt9KrpyOeIH7B1YXulRabrFAT4sraT2yj9Ioz63St-Fp9AfYb_BzSXFlgnzzJh47nPN750dnujJhkp3VW55u9W6JeZBJh3V6uKHJantfST6FTR-Axf2VrTvuDvrRuZvA3r6H9twyfAuSk7fssusid_YeYMVZh5j75Rk1TDccx_HnFU6MJ1g981k-ZeoaavcJ0cGXbnLAlAcmTzyifnByN8awV7aqu9pXWYMS2VnL2qZd63O-kS12G76O8ATswsbrcoBpUnDe759LrNv9tivnV8XkI_sSw9EwA1cP-n1Qbbbd_WIvNx47TsbaF-ZUXXwpLpjuMT554MQnx5JPQJAdUFXvFqpt5qScp5GOC2Pil4eFGgTRbTgtZTpc9WF3ABcldv2l56tliVPecsamsM_Tu8-2xRD2-S6a8zadX277YvCM0sv1_dZXQEKDZST3o7aQ6CoIU1s3zM3oPN94kWmbVDmeoi8CzXrf09H6GB-L6-lgndd0g0e7FJ_TVHr6p9PxuRkZtD6l5fPmRYO0W7msX5ipDQLSfm3-1_1o6yCWFYlZ1NSi_KlIYjREGanFklQia0gVNowXYtwSseFiWIisrlsiXnjTZKQgUSqMsejoIEZZyPJaHH-i3_1DFPEqZgV9rQZakEpA-s8HY1P0EiLmYc_yNhebpOItTcq2Ea8Vf42JGJOIx6SqRVaLV95WIivqpmqjF1Mt8kq8sgcRBd0UsM7LN3SU8Sh9q_id5MByloWVWFb8kpFc7FiTiHZEsjAlr4MxpCEr3pHfnP8PktUiy8uKP0j8EvdN8je8P2GQLnYJqYh4SIdXVDEJ36o-P-LZONbGWvhBZqOppKoymmrjj2QWkakqq2qoqZqkEKKFYUhC-TJVw7FK0Dj8YDMkIVlCSJEm4_Fo_BlrSItJGJORFmnTayjIEslDln1m2SN_HdQf3wWcqUiT1I8svJCs_u6kCBWke1dXQOjVWKvZa81fl5bWgixlrG7q_3ppWJOR2Xp9cn6v_i9l0X9-lMn_yMlHW2WzP7oJa5L28hnxXEDWK9DP46-y4jcSNQKyvn3WArK-8f8dAAD__zO8jP0">