<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/81638>81638</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[RISCV] Poor lowering of shuffle of build_vector idiom
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:RISC-V
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
preames
</td>
</tr>
</table>
<pre>
In the examples below, we have a shuffle of a build_vector. This is resulting in the emission of a vrgather instead of e.g. a build_vector sequence (such as 4 vmerges). The difference between the first and second is the interaction with splitting during lowering.
```
; RUN: llc < %s -mattr=+v
source_filename = "satd.c"
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-unknown"
@discard = local_unnamed_addr global <16 x i8> zeroinitializer
define void @test_zvl128(i32 %a, i32 %b, i32 %c, i32 %d) vscale_range(2,2) {
entry:
%0 = insertelement <8 x i32> poison, i32 %a, i64 0
%1 = insertelement <8 x i32> %0, i32 %b, i64 1
%2 = insertelement <8 x i32> %1, i32 %c, i64 2
%3 = insertelement <8 x i32> %2, i32 %d, i64 3
%4 = shufflevector <8 x i32> %3, <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 2, i32 3>
store <8 x i32> %4, ptr @discard, align 64
ret void
}
define void @test_zlv256(i32 %a, i32 %b, i32 %c, i32 %d) vscale_range(4,4) {
entry:
%0 = insertelement <8 x i32> poison, i32 %a, i64 0
%1 = insertelement <8 x i32> %0, i32 %b, i64 1
%2 = insertelement <8 x i32> %1, i32 %c, i64 2
%3 = insertelement <8 x i32> %2, i32 %d, i64 3
%4 = shufflevector <8 x i32> %3, <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 2, i32 3>
store <8 x i32> %4, ptr @discard, align 64
ret void
}
```
</pre>
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