<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/80557>80557</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1649: condition is always true ?
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dcb314
      </td>
    </tr>
</table>

<pre>
    Static analyser cppcheck says:

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1649:32: warning: Logical disjunction always evaluates to true: InstDisp < 32768 || InstDisp >= -32768. [incorrectLogicOperator]

Source code is

 assert(((InstDisp < 32768) ||
            (InstDisp >= -32768)) &&
 "Expecting the instruction displacement for local-exec TLS "
 "variables to be between [-32768, 32768)!");

Perhaps intended code might be

    assert(((InstDisp < -32768) ||
 (InstDisp >= 32768)) &&
               "Expecting the instruction displacement for local-exec TLS "
               "variables to be between [-32768, 32768)!");

</pre>
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