<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/78490>78490</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Missed optimization in x86 codegen: `lea + lea` -> `lea + add` with ` -Xclang -target-feature -Xclang +slow-3ops-lea`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          minglotus-6
      </td>
    </tr>
</table>

<pre>
    This is the x86 split of [issue 78214](https://github.com/llvm/llvm-project/issues/78214).

https://gcc.godbolt.org/z/eb7acYvb1 shows the reduced C++ source code, IR and generated code for x86. The C++ source code has an outer loop (`do {...} while`) and an inner-loop (unrolled into two basic blocks)

The `LBB0_1` is the first unrolled basic block in the inner-loop. In Clang trunk, the following `lea` sequence could be optimized on some x86 processors where `lea` has longer latency and lower throughput (e.g., on Intel skylake per [Agner's instruction table](https://www.agner.org/optimize/instruction_tables.pdf))

```
in #LBB0_1
lea     rcx, [r14 + r13] <--0
test    r13d, r13d
lea rdx, [r14 + rax + 1] <--1
lea     rax, [r14 + rax + 2]  <--2
lea r15, [r14 + r13 + 1] <--3
```

Both `2` and `3` could be optimized to `add reg, imm`.
</pre>
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