<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/76948>76948</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            f16 rsqrt pattern fails to use v_rsq_f32 on targets without legal f16 
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU,
            code-quality
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          arsenm
      </td>
    </tr>
</table>

<pre>
    
```
define hidden noundef half @test_rsqrt_f16(half noundef %x) local_unnamed_addr #0 {
entry:
  %0 = tail call contract half @llvm.sqrt.f16(half %x)
  %1 = fdiv contract half 0xH3C00, %0
  ret half %1
}
```

This fails to make use of v_rsq_f32 on gfx6/gfx7. gfx8+ fuses this to just v_rsq_f16. -mcpu=tahiti gets a full fdiv expansion:

```
test_rsqrt_f16:                         ; @test_rsqrt_f16
        s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
        v_cvt_f16_f32_e32 v0, v0
        s_mov_b32 s6, s33
        s_mov_b32 s33, s32
        s_mov_b32 s33, s6
        v_cvt_f32_f16_e32 v0, v0
        v_sqrt_f32_e32 v0, v0
        v_cvt_f16_f32_e32 v0, v0
        v_cvt_f32_f16_e32 v0, v0
        v_div_scale_f32 v1, s[4:5], v0, v0, 1.0
        v_rcp_f32_e32 v2, v1
        v_div_scale_f32 v3, vcc, 1.0, v0, 1.0
        v_fma_f32 v4, -v1, v2, 1.0
        v_fma_f32 v2, v4, v2, v2
        v_mul_f32_e32 v4, v3, v2
        v_fma_f32 v5, -v1, v4, v3
        v_fma_f32 v4, v5, v2, v4
        v_fma_f32 v1, -v1, v4, v3
        v_div_fmas_f32 v1, v1, v2, v4
        v_div_fixup_f32 v0, v1, v0, 1.0
        s_setpc_b64 s[30:31]

```


</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyMVU2PozgQ_TXmUurIH0DIgUMyUXYvK-1h94yMsYOnjWGwYdL_fmSTD6YnGU0UOXLq1XtVr5KCO6fPVsoSZQeUHRM--bYfSz46abuk7puPEuEjwnuU4-s7XhuptJXQ6qaRFmw_2UYqaLlRgFLspfPV6L6NvlIkR7SIgRsK0eyC6A5ML7ipJmt5J5uKN80IiDIMaHtYRKT14wdi--UGIREDYkfwXBsQ3BgQvfUjF_4ubczcbYLyZqV8VVzxkMijGj1_osCXv9kXjBH9EuVuKaO8SdCMXB3ZHp9as5z_tdqB4to48D10_F3C5CT0CubgTKUYhd7CWV1yRE9nddluwqVA9ABqctKBDwy-h6-T87ckkm_grRPDhNjR81Z7DWfpHXBQkzFLP_IycOt0b-_OPS3z04zYHl69EDs8GeqVeeeq71x7YT3MnbAe0QKH4crLsLqZ8_sqeM-dKzFHtmBHJRmFOTo_4xV9189VzSi4PIQcY89ijC1B-ptg_lmX0aj9VHeulk5f1fUHpf-RSqPnygluZPxFzCRWirJDitg-Q9nxmnA_yWadPYrhoU8jirwmjzbMQtx4XpCqji_4NMTelpoW9hfARTl94Ga6gnWTeRS5gNgvoDtXtha9oV8Vt6Dv-k9g5Pd0wSHVcbcCr_v9iTNi9WUaFjBegX9x0VVO-kFUdZ7GcTKM2J6RMNDXf8nlTJqSNTu244ksyRanbJvhIkvaUtZZTRqxLQTdsUwItStoLguCKWEib0iiS4ppiglOCWOEphuV80ZgvJMZwzgrCpRi2XFtNnFL9uM50c5Nstzmu7RIDK-lcfFJQGnNxbu0DWL7_T_Hv_79H9FgCKJU9I18-zZxo_1H-DI7JmMZ-N7q6ezCBtbOu4eC197IUpEc4u6AgXsvR_vYjWEt_rQTPR_jUvuufdtPHow8cwOBIZlGU7beDy7sNnoKm1P7dqo3ou8QPQXR68fbMPZfpfCInmKPDtFTbPNHAAAA__92kvlp">