<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/75004>75004</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Missing optimization: fold `k & c ? 0 : k & c1` to `k & !c ? 0 : c1` to remove bitmask in select arm
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          XChy
      </td>
    </tr>
</table>

<pre>
    Alive2 proof: https://alive2.llvm.org/ce/z/Wb7Pbx

### Description:

```c
int src(bool k, bool c, bool c1) {
    return k & c ? 0 : k & c1;
}
```
can be folded to:
```c
int tgt(bool k, bool c, bool c1) {
    return k & ~c ? c1 : 0;
}
```
For control flow graph, it can be something like:
```llvm
define i1 @src(i32 noundef %bytes, i1 %c, i1 %c1) #0 {
entry:
  %cond.not = icmp ne i32 %bytes, 0
  %or.cond = and i1 %cond.not, %c
  br i1 %or.cond, label %cleanup, label %land.lhs.true4

land.lhs.true4:
  %or.cond20 = and i1 %cond.not, %c1
  ret i1 %or.cond20

cleanup:
  ret i1 0
}
; can be transformed to
define i1 @tgt(i32 noundef %bytes, i1 %c, i1 %c1) #0 {
entry:
  %cond = icmp eq i32 %bytes, 0
  br i1 %cond, label %cleanup, label %land.lhs.true

land.lhs.true:
  br i1 %c, label %cleanup, label %land.lhs.true4

land.lhs.true4:
  ret i1 %c1

cleanup:
  ret i1 0
}
```
Note, we can only do such transform when there is no side-effect instructions in basic blocks.

### Real-world motivation

This snippet of IR is derived from [redis/src/config.c](https://github.com/redis/redis/blob/62419c01db4499e52ddcb689726cfa732a9736a6/src/config.c#L1272C3-L1272C3) (after O3 pipeline).
The example above is a reduced version. If you're interested in the original suboptimal IR and optimal IR, see also:https://godbolt.org/z/369xndjMa

**Let me know if you can confirm that it's an optimization opportunity, thanks.**
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0VkuP2zYQ_jX0ZbCCRNmSdfBhNwsBAZK2CAq0Vz5GFmOKVEnKjnPoby9IyWt780JQBBDM1zy-mW_IMfNe7Q3ijmyeyOZ5xabQW7f7-01_XnErz7tHrY5IYXTWdqR8hD6E0ZPykdCW0Jal00zr45BZtye0FUho-5nQ9i9e_8E_kfyZ5I_LLy3nD57RC6fGoKyJpm5lqnz-xLxWJoB3gtAtt1bDgdA3kGbiOisIbYDUT7MGAIDDMDkDByC0AgGkbCGHiH7ZKUi5SJP6-ZXjeSmYAY7QWS1RQrBXmF8BGPbh_wD8d0YoigQx_yG21joQ1gRnNXTanmDv2NhHdyrAAtzbAUOvzB60OuCX6CNj85bEThkEVQBZ53OqVUnB2MlI7IDQDT8H9Ml8EZfiZjpHRsv8Gh6a4M4vDiGJWSMzYwOQ8hmUGEaIDkt6Zzy_UbAuizpJnhl58baYidIJx6LA3SKwqMVzzTjqJKWRmWm829PMyEz3PgtuwvVt-b06uYtisU7zH8AqLjoOwz0wmt_6uiC7OlkU8tf0l08XWoNjxnfWDXNRfkngXIq_gsArefjPt8l74eLnifgmDzdYruZ_BclXwi4k_ixT9xf1NxswYjph4s8afQZpwU-ivzIJpx4NhB4dgvJgLHgl8QG7DkUAZXxwk4gvpQdlgDOvBHBtxcFnX39cPyDTDyfrtITBBnVk6Zm9Ef2zVx68UeOIAWwHbz9ExxKdOqKEztkByObJoVSe0DY9Ca2wplP7TJDNM6Hb-yawV6GfeCbsQGh7UbuMXFtOaFvRddGIvJB8vW4a3FApBa-2TU0r0bG6pKypy4pVXzqk5buC1vRN-bCMc8VuWRfQwe8ljGpErQwS2mSXABHwExtGjcC4PabEMnAoJ4ESjui8siaDtx2c7URoHVNvAjr0AWVMc-gRrFN7ZZgGP3E7BjUwHVMVL_51Gen1iMC0jz3iVWKs5FaHpTPGplhWzScjP75n99TF7x0GGBAOxp5AJWCpaFIe3AChZwFUILT2EGspIlCfE7dgx9G6MBkVzhFP6JmJ1ZHMruSulE3ZsBXuijqnlNYVLVb9juFaiI3gvGka1mHHWEFrXpRFiXyzRr5SO5rTsqBFXtR5XmwzVvGi2W7KNd9WDZeCrHMcmNIv7X-lvJ9wV2_yfL1KF9Gn_xWUGjxBOiSUxr8Zbhd1Hvi092Sda-WDv1oJKmjcvVfex_51G2nsj7ElA6ny7zT3KodgrzKEFrdiLwIOh1gbXIWB-UOk3aOOl465YTU5vftOmaf-OQ8Po7MfUQRC2xRirPqUgv8CAAD__6bJvDk">