<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/73783>73783</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] X86FixupVectorConstantsPass - add support for VMOVD/VMOVQ/VMOVSS/VMOVSD zero upper constant loads
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:X86
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    X86FixupVectorConstantsPass currently just handles folding full vector loads to broadcasts, but we're missing the opportunity to use scalar loads for cases where all the upper vector elements are known to be zero.

We should be able to do this for SSE cases as well.

Related to #71078
</pre>
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