<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/73831>73831</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [InstCombine] Missing optimization : Canonicalize `select cond, load p1, load p2)` to `load (select cond, p1, p2)`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            llvm:instcombine,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          XChy
      </td>
    </tr>
</table>

<pre>
    Alive2 proof: https://alive2.llvm.org/ce/z/qnxNDq
Missed example: https://godbolt.org/z/PnTeWE8hq

### Description:
```llvm
define i32 @src(i1 %c)  {
entry:
  %a = load i32, ptr @A, align 4
  %b = load i32, ptr @B, align 4
  %A_B = select i1 %c, i32 %a, i32 %b
  ret i32 %A_B
}
```
can be canonicalized to:
```llvm
define i32 @tgt(i1 %c)  {
entry:
  %A_B = select i1 %c, ptr @A, ptr @B
  %res = load i32, ptr %A_B, align 4
  ret i32 %res
}
```
Though X86 backend generates something like `cmove` for the former, other ISA's backends may not handle it well.
And from IR level, the latter is easier to analyze, while the former resists other optimizations like `GVNSink`, example: https://alive2.llvm.org/ce/z/h5BL-r

### Real-world motivation

This snippet of IR is derived from [redis/src/extr_cluster.c](https://github.com/redis/redis/blob/unstable/src/cluster.c) (after O3 pipeline).
The example above is a reduced version. If you're interested in the original suboptimal IR and optimal IR, see also:https://godbolt.org/z/Te9ear19Y

**Let me know if you can confirm that it's an optimization opportunity, thanks.**
</pre>
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