<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/72539>72539</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [SelectionDAG] Assertion `Index < Length && "Invalid index!"' failed.
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            llvm:crash,
            llvm:SelectionDAG
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            RKSimon
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          danilaml
      </td>
    </tr>
</table>

<pre>
    LLC asserts on the following IR turing isel:
```llvm
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
target triple = "x86_64-unknown-linux-gnu"

define void @test(<8 x i32> %insertelement) #0 {
bb:
  %load671 = load i8, ptr addrspace(1) null, align 1
  %shufflevector = shufflevector <8 x i32> %insertelement, <8 x i32> zeroinitializer, <8 x i32> zeroinitializer
  %xor68 = xor <8 x i32> %shufflevector, <i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
 %call69 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> %xor68)
 %trunc70 = trunc i32 %call69 to i8
  %xor71 = xor i8 %load671, %trunc70
  store i8 %xor71, ptr addrspace(1) null, align 1
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.xor.v8i32(<8 x i32>) #1

attributes #0 = { "target-cpu"="skylake-avx512" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```
reproduces with simple `llc`, no additional parameters required. Seems to be an issue in the code added in https://github.com/llvm/llvm-project/commit/5dff767c25041c1dfbba42520ce59e8f837b19ad , where `SizeInBits` is 8 (truncated load from constant pool), but `SrcEltSizeInBits` is higher (128, I think), resulting in `NumSrcElts` being zero (so zero size vector is allocated and then used in `unsigned SrcEltSizeInBits = SrcEltBits[0].getBitWidth();`).

Godbolt link: https://godbolt.org/z/v58E8rEGb
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJysVklv6zYQ_jX0ZWBDolYffPASPwR96OHl0GNBiSOLDUW6JOU4-fXFUIqz9KFFigKJPBySH79ZSeG9OhnEDSt2jPMfvzyowRrGOSsOCzGG3rqNFEZpMehFY-Xz5vv3PQjv0QUP1kDoETqrtX1S5gT3PyCMjiTlUbNsy5IDS7asTKY_rS_DpArCnTCAFEFo8WzHACw7AOMclwPLtrg88yph2Tbj8UPD9OOQpDKPn6W6CSmvWbZNeb3s6mSWTFSVr9vLfPkQ1YrUyzN_najn_4xPc5z88J5tcOqs8ZXptS5_L_PlaB6NfTJLrcx4XZ7MeNs1fSV2yiBcrJLA8iSgD4xI7mu4gqKD74DxQhnyKWoc0ATG18B4lgCrdhNK09y8CbRcWyHLKo1cSAZVM76Hc3AgpHT-LFpkvE4JyYxa06TQ6mQgfYfi-7HrNF6wDdZFrM-af2a5_7TiBZ1VRgUltHpB9-8L3qhcrSvrSOH6s4M_8JpxVcahIpmE5D8K2d1MgvGiFVqX60iCxLiC5TFrV9PJK4dybHF1tW51qYneT0IZTWF8_QYc3GjaKonIUZ6gbycGS_H74Iw5tuQMVb-LeLT9hvi6xwfrcF4YN381GRyGmKJz5laH9ynMsh0cR9MGZQ1sQ3CeZVswltg3on0EYzuHCMb6Z9OCsaN5UkaCP2M7ahFEoxGelNYOw-gMDDhY98x4bazBm6MktlqQFV_3-lwv6XvSIgSnmjGgn0uJqrbaUeVO5bxsz7FWswPj3D8-a_GIS3G5FikVPtx88BEovQH9f_a_nXXrlNPQ4dlZMt3Dkwo9eDXEBkSdtKVVfA_GUpAVxUZoOAsnBgzoPDj8c1QO5QoeEAdPSdYgCAPK-xFBTc27tRIJACVp-hDOFFzGj4wfTyr0Y7Nq7cD4Mfbu6Wd5dvYPbAPjx9YOgyKhkF1XlVXLiyRP21R2TSNyXvCkxWKNdVdnVZOuhQTi_NSji2Y8qBe8NzsVPCsTUB4og-uY3CKgnFpb5-wArTU-CBPgbK2mnOF7aOjaKJMH197p8DeoXp16dIRHlwLfwz2EXpnHebNDP-oQ7ypDKL-OwwQU9zdIM9SuCMDbSfTqBWHujcqD0NpOPIWR5E0Do58cycpkNPFulfCZX8ygSRnpFruEFYfVCWn4m5Khp_zma5btYozXq_d5_c3KxuoAmkzJtp9DNs2urDsxfnxh_Hgp6rva3X1rFnKTyXW2FgvcpFWSpEWZ83zRb6q8adIa23Xe8baWEvOsQCHzrMSmQEwWasMTnqVpWqZVnnC-ErLuynXJ12XSlKJrWZ7gIJRexaK17rSIObapeJGtF1o0qP38xIhplG1bJ3xP1cf3b8oH1BibzGH7bX6DuE1MuGY8eeoJygf_dkhQQceny4eNxQG28YFC3YqVyb2ReKX7Ar6jOYUeGC8ZL6kR3JuL0IoCJvHKeBoJVdAJpVGuFqPTmy9XRLTcM36Mxv8VAAD__28x0hE">