<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/71915>71915</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[Flang][OpenMP] default(firstprivate) failing with parallel do
</td>
</tr>
<tr>
<th>Labels</th>
<td>
bug,
flang:ir
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
NimishMishra
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
NimishMishra
</td>
</tr>
</table>
<pre>
`default(firstprivate)` fails to privatize when used with parallel do. Reproducer:
```
program sample
integer :: x
x = 10
!$omp parallel do default(firstprivate) num_threads(50)
do i = 1, 50
x = x + 1
end do
!$omp end parallel do
print *, x
end program sample
```
Current IR (mainly `fir.store %10 to %1 : !fir.ref<i32>`):
```
%0 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFEi"}
%1 = fir.alloca i32 {bindc_name = "x", uniq_name = "_QFEx"}
%c10_i32 = arith.constant 10 : i32
fir.store %c10_i32 to %1 : !fir.ref<i32>
%c50_i32 = arith.constant 50 : i32
omp.parallel num_threads(%c50_i32 : i32) {
%8 = fir.alloca i32 {adapt.valuebyref, pinned}
%c1_i32 = arith.constant 1 : i32
%c50_i32_1 = arith.constant 50 : i32
%c1_i32_2 = arith.constant 1 : i32
omp.wsloop for (%arg0) : i32 = (%c1_i32) to (%c50_i32_1) inclusive step (%c1_i32_2) {
fir.store %arg0 to %8 : !fir.ref<i32>
%9 = fir.load %1 : !fir.ref<i32>
%c1_i32_3 = arith.constant 1 : i32
%10 = arith.addi %9, %c1_i32_3 : i32
fir.store %10 to %1 : !fir.ref<i32>
omp.yield
}
omp.terminator
}
```
Expected IR should be as follows (mainly `fir.store %12 to %9 : !fir.ref<i32>`):
```
%0 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFEi"}
%1 = fir.alloca i32 {bindc_name = "x", uniq_name = "_QFEx"}
%c10_i32 = arith.constant 10 : i32
fir.store %c10_i32 to %1 : !fir.ref<i32>
%c50_i32 = arith.constant 50 : i32
omp.parallel num_threads(%c50_i32 : i32) {
%8 = fir.alloca i32 {adapt.valuebyref, pinned}
%9 = fir.alloca i32 {bindc_name = "x", pinned, uniq_name = "_QFEx"}
%10 = fir.load %1 : !fir.ref<i32>
fir.store %10 to %9 : !fir.ref<i32>
%c1_i32 = arith.constant 1 : i32
%c50_i32_1 = arith.constant 50 : i32
%c1_i32_2 = arith.constant 1 : i32
omp.wsloop for (%arg0) : i32 = (%c1_i32) to (%c50_i32_1) inclusive step (%c1_i32_2) {
fir.store %arg0 to %8 : !fir.ref<i32>
%11 = fir.load %9 : !fir.ref<i32>
%c1_i32_3 = arith.constant 1 : i32
%12 = arith.addi %11, %c1_i32_3 : i32
fir.store %12 to %9 : !fir.ref<i32>
omp.yield
}
omp.terminator
}
```
</pre>
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