<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/71926>71926</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[X86][GISel] Assertion `isa<const TargetRegisterClass *>(VRegInfo[Reg.id()].first) != 0 && "Register class not set, wrong accessor"` failed
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:X86,
llvm:globalisel,
crash-on-valid
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
antoniofrighetto
</td>
</tr>
</table>
<pre>
Consider the following LLVM IR:
```llvm
define i8 @udiv(i2 %0) {
%2 = sext i1 true to i8
%3 = udiv i8 1, %2
ret i8 %3
}
```
When lowered to x86 via GISel w/ no optimizations enabled through latest llc (`llc -march=x86 -O0 -global-isel in.ll`), the following assert is triggered:
```
llc: /root/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:664: const llvm::TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass(llvm::Register) const: Assertion `isa<const TargetRegisterClass *>(VRegInfo[Reg.id()].first) && "Register class not set, wrong accessor"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel -O0 -march=x86 -global-isel <source>
1. Running pass 'Function Pass Manager' on module '<source>'.
2. Running pass 'Fast Tile Register Preconfigure' on function '@udiv'
#0 0x0000000003466158 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x3466158)
#1 0x00000000034638ac SignalHandler(int) Signals.cpp:0:0
#2 0x00007f2c823e5420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
#3 0x00007f2c81ea800b raise (/lib/x86_64-linux-gnu/libc.so.6+0x4300b)
#4 0x00007f2c81e87859 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22859)
#5 0x00007f2c81e87729 (/lib/x86_64-linux-gnu/libc.so.6+0x22729)
#6 0x00007f2c81e98fd6 (/lib/x86_64-linux-gnu/libc.so.6+0x33fd6)
#7 0x0000000001bb5bbe (anonymous namespace)::X86FastPreTileConfig::runOnMachineFunction(llvm::MachineFunction&) X86FastPreTileConfig.cpp:0:0
#8 0x0000000002736b51 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
#9 0x0000000002cbfec9 llvm::FPPassManager::runOnFunction(llvm::Function&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2cbfec9)
#10 0x0000000002cc0101 llvm::FPPassManager::runOnModule(llvm::Module&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2cc0101)
#11 0x0000000002cc0922 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2cc0922)
#12 0x00000000006a28c3 main (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x6a28c3)
#13 0x00007f2c81e89083 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x24083)
#14 0x000000000075a01e _start (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x75a01e)
Program terminated with signal: SIGSEGV
Compiler returned: 139
```
Godbolt: https://llvm.godbolt.org/z/h3Kq1dz1z.
Haven't investigated it properly, though it seems like `VRegInfo` is empty by the time it is accessed with `VirtReg` being `0x80000000`.
https://github.com/llvm/llvm-project/blob/3af0ff99b1bf92dcac29bc1f9f896b5e41497dc0/llvm/lib/Target/X86/X86FastPreTileConfig.cpp#L668-L673
cc/ @RKSimon
</pre>
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