<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/70270>70270</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Suspicious anyextend in MOPS GlobalISel codegen
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            llvm:globalisel
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            davemgreen
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          aemerson
      </td>
    </tr>
</table>

<pre>
    I just saw this code in AArch64LegalizerInfo.cpp. Notice how the comment says zext but an anyextend is being generated.
```
  case Intrinsic::aarch64_mops_memset_tag: {
    assert(MI.getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS);
    // Zext the value to 64 bit
    MachineIRBuilder MIB(MI);
    auto &Value = MI.getOperand(3);
    Register ZExtValueReg = MIB.buildAnyExt(LLT::scalar(64), Value).getReg(0);
 Value.setReg(ZExtValueReg);
    return true;
  }
```

Same again here:
```
bool AArch64LegalizerInfo::legalizeMemOps(MachineInstr &MI,
                                          LegalizerHelper &Helper) const {
  MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;

  // Tagged version MOPSMemorySetTagged is legalised in legalizeIntrinsic
  if (MI.getOpcode() == TargetOpcode::G_MEMSET) {
    // Zext the value operand to 64 bit
    auto &Value = MI.getOperand(1);
    Register ZExtValueReg =
        MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0);
 Value.setReg(ZExtValueReg);
    return true;
  }

  return false;
}
```

@davemgreen @tyb0807 
</pre>
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