<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/69440>69440</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[AArch64][SVE] combine ld1d and splice into ld1ro
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
vfdff
</td>
</tr>
</table>
<pre>
* test: https://gcc.godbolt.org/z/f855xG5Mf
```
define <vscale x 2 x double> @ld1rod_double(<vscale x 2 x i1> %pred, ptr %addr) nounwind {
%res = call <vscale x 2 x double> @llvm.aarch64.sve.ld1ro.nxv2f64(<vscale x 2 x i1> %pred, ptr %addr)
ret <vscale x 2 x double> %res
}
define <vscale x 2 x double> @combine(<vscale x 2 x i1> %pred, ptr %addr) nounwind {
%a = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.nxv2f64(<vscale x 2 x i1> %pred, ptr %addr)
%res = call <vscale x 2 x double> @llvm.aarch64.sve.splice.nxv2f64(<vscale x 2 x i1> %pred,
<vscale x 2 x double> %a,
<vscale x 2 x double> %a)
ret <vscale x 2 x double> %res
}
```
* current output of llvm
```
ld1rod_double: // @ld1rod_double
ld1rod { z0.d }, p0/z, [x0]
ret
combine: // @combine
ld1d { z0.d }, p0/z, [x0]
splice z0.d, p0, z0.d, z0.d
ret
```
</pre>
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