<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/69408>69408</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISCV] isel generates invalid SLRIW instruction on riscv32
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          shkoo
      </td>
    </tr>
</table>

<pre>
    The following crashes llc when assertions are enabled.  (When they aren't, I just get invalid machine code causing an illegal instruction when executing the resultant code):
```
; ModuleID = 'bugpoint-reduced-simplified.bc'
source_filename = "reduced.ll"
target triple = "riscv32"

define i24 @aext(i32 %0) {
  %2 = and i32 %0, -256
  %3 = lshr exact i32 %2, 8
  %4 = trunc i32 %3 to i24
  ret i24 %4
}
```
Here's what I get when executing:
```
$ llc bugpoint-reduced-simplified.ll
LLVM ERROR: Attempting to emit SRLIW instruction but the Feature_IsRV64 predicate(s) are not met
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llc bugpoint-reduced-simplified.ll
1.      Running pass 'Function Pass Manager' on module 'bugpoint-reduced-simplified.ll'.
2.      Running pass 'RISC-V Assembly Printer' on function '@aext'
 #0 0x000000000290cd5d llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) llvm/lib/Support/Unix/Signals.inc:723:11
 #1 0x000000000290d24b PrintStackTraceSignalHandler(void*) llvm/lib/Support/Unix/Signals.inc:798:1
 #2 0x000000000290b2b6 llvm::sys::RunSignalHandlers() llvm/lib/Support/Signals.cpp:105:5
 #3 0x000000000290da25 SignalHandler(int) llvm/lib/Support/Unix/Signals.inc:413:1
 #4 0x00007ffbd0a7a420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
 #5 0x00007ffbd050d00b raise /build/glibc-SzIz7B/glibc-2.31/signal/../sysdeps/unix/sysv/linux/raise.c:51:1
 #6 0x00007ffbd04ec859 abort /build/glibc-SzIz7B/glibc-2.31/stdlib/abort.c:81:7
 #7 0x0000000002844064 llvm::report_fatal_error(llvm::Twine const&, bool) llvm/lib/Support/ErrorHandling.cpp:125:5
 #8 0x0000000002843ed2 llvm/lib/Support/ErrorHandling.cpp:83:3
 #9 0x0000000000eac075 llvm::RISCV_MC::verifyInstructionPredicates(unsigned int, llvm::FeatureBitset const&) build/lib/Target/RISCV/RISCVGenInstrInfo.inc:112254:1
#10 0x0000000000c69c4f (anonymous namespace)::RISCVAsmPrinter::emitInstruction(llvm::MachineInstr const*) llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:228:3
#11 0x000000000126d58f llvm::AsmPrinter::emitFunctionBody() llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1735:13
#12 0x0000000000c69a72 (anonymous namespace)::RISCVAsmPrinter::runOnMachineFunction(llvm::MachineFunction&) llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:376:7
#13 0x00000000016c14fc llvm::MachineFunctionPass::runOnFunction(llvm::Function&) llvm/lib/CodeGen/MachineFunctionPass.cpp:93:8
#14 0x0000000001eb850a llvm::FPPassManager::runOnFunction(llvm::Function&) llvm/lib/IR/LegacyPassManager.cpp:1435:23
#15 0x0000000001ebd332 llvm::FPPassManager::runOnModule(llvm::Module&) llvm/lib/IR/LegacyPassManager.cpp:1481:16
#16 0x0000000001eb8dbb (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) llvm/lib/IR/LegacyPassManager.cpp:1550:23
#17 0x0000000001eb893d llvm::legacy::PassManagerImpl::run(llvm::Module&) llvm/lib/IR/LegacyPassManager.cpp:535:16
#18 0x0000000001ebd611 llvm::legacy::PassManager::run(llvm::Module&) llvm/lib/IR/LegacyPassManager.cpp:1677:3
#19 0x0000000000c19c11 compileModule(char**, llvm::LLVMContext&) llvm/tools/llc/llc.cpp:743:41
#20 0x0000000000c17f2d main llvm/tools/llc/llc.cpp:416:13
#21 0x00007ffbd04ee083 __libc_start_main /build/glibc-SzIz7B/glibc-2.31/csu/../csu/libc-start.c:342:3
#22 0x0000000000c1770e _start (build/bin/llc+0xc1770e)
Aborted (core dumped)

```

I'm building from commit ID beffc821e8290136a1d8b359cc83487c359b48ca:
```
LLVM (http://llvm.org/):
  LLVM version 18.0.0git
  DEBUG build with assertions.
  Default target: 
  Host CPU: znver2

  Registered Targets:
    riscv32 - 32-bit RISC-V
    riscv64 - 64-bit RISC-V

```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0WNtv46rz_2voC0pkg68PfUgv2Y3U6lTp7p7HCONxwlkMEeC22b_-J3Cc2Dnd6-98qyoJZjzzmSszMGvFVgFco_QGpXdXrHM7ba7t7qvWV5WuD9efdoAbLaV-FWqLuWF2BxZLyfHrDhRm1oJxQiuLmQEMilUS6jnGiBR_ewK3g4PfUojkDpFbvML_dNbhLTgs1AuTosYt4zuhAHNdA-ass14UU1hICVsmsVDWmY57Mb1UeAPeOU_ldoAN2E46plxggEiJ6AJFdyhaoCw6_vdLeoMfdd1JWN1hRO8wInnVbfdaKDczUHcc6pkV7V6KRkA9rzgief-q1Z3hsGmEBMVaOL5Nji_NpUSE9JSOGa-bM2Ivz3TC8hdKTkT9Zw2NV1uQBKMkYvDmECkEJRiRNEKkxCi_6Sm9PVMSuDFV4zPNLZ6RNBsR0UAk7c5geGPcDbTE0xYjwiQQOtMpPtBQ7LRHM1AZ7yMPjqTHZyi_e9eyH8EAIrnFrzvm8Cp4d-qp7_qEJCGafuQHKXvah4cvj_h-vf5rjegCL5yDdt9HgcbQCoef1w-rvyfhUnUuxMgSmOsMbFZ2_SVL8N5ALThzgEhhvaV98CrtcAuul_X0cL94vse2qzxj5vFhA3ttnJe2c25vvUpkichyK9yuq-Zct4gspXwZvmZ7o_8B7hBZCms7sIgse_8pLrsaArKQUrhi_KszjMO8F__sGP-K667dnwwXzXH4ezJ6a1iLmdl2LSjncfyyCeMjk3WnlLfcnlnr02DZqd5gT_7BI1NsCwaRHGuF25AyP0sWnwL5ET35jpT16vl29gUvrIW2kgf8ZIRyJznNgMFn3ZAPx_zDiNAIR2_R8EfKiNdpjYO56QLRhT3Y_kfgGgz4yVsUkeJMZNjrRltngLWIZD4nhHI-AAa3iQqR5XO3955GZPlZiTf_QGwVk3YuFEd0kROK6CKOz9DiC2g1SSp8gaPn8ZGpWnqVixctakQWvy28LLzws2xyIbsiVfaeWdadmkCwiBQ_ED5I5XsfgnGUIrpIz1LppcaMpPhSxT-wbRLTqXrJUVDeNFUdsZwlJMKbjQHrtIGNcTjoceT-VmSbLJlJobq32VZ1_cbe7Qywem71PELkJnqLk4T4CnsWk07EpFEdRRU2TFgf-MuqE7L2mS5FxWfP31bf8pvTksxpjMjSBj0QWc7nfnWwNex9xne9mvZgXwIa1fllYD33GqfxVOFsgiQBXqQlZpUOmv4aElf31ghvBSGFFzLKpXziviJJoiwZBU1f6TYNc0xuwBhtJln06bU_rpV1xyyqtJY_cPW9ZxHiQqjtEFLkIqSKC0wUavI7DAsfOfTMrxzzi4DxKE9HOvpi9GXzeNuvXsCI5rA6Hx1PwxHh86RToU-q-2pxO-JyPFhuhLPgRiYp8eCpHvqn0BYgsgxih-8PoILIlWr0MQHimPjj9hQSvrpMKl_Es5InjQ97prQ6tLqz2Dcldh-qXTlSb2HbocaGh_6UHOk4cepj34WF7UGRf1en9_U4yzn6gpDi7AyvwqRCxiSr06IZmfE9oMOZdKPrw3u16lbX8ME3lsvR2-PFEGg59ZEWj9CQS4OynPyRQU2n_lJHyw1437PqeS_7U5PSPDvnsFdiUoLjjMdJw_F3JfuDfYT5XbA_Qnm29juMjxBLn4HFGWEyQQhVkUZsnDtP_t2h2fh_YFutEVk-wJbxw4jj4P4kuJ-M3J9e4KopJb-Aq58dpu49PvptTKEgx9kZU3Zpq7qqfhaSj_97oGkaXRgvvwRa0nEbJgOnYyd25rdq9_KE8L9AlvZJPbJgcenVLI5_Duw_BRVneT6te9NDiMclj2PMdbsXEk5u4jtmQrFdTA8XP_DcauVCJzyG4rSWNkwZvP88ys8TGnqok3xycXTEeUP8wC3Uz1glcTYtmiS-aEwgKijebHznsbGOGbcJfH-xSeG2G3ql_mfYDHxCx0ITMrEkIZea5BHgXrDPk0FmJdSgzU301pOdOr2Fb4ig9vRcGwgDFtSn7fcn1PC5QiRv-zPdTzSN0a13ox8OV3e4gqbhBYmhIGUU04zFdVHRtOS8oEmRc5qWVVJw9r0pOEy2iBR-rjyNld5Bc222YXW-1MA4UL-AsX5Yiot5NI-2wg27d_c3nz_0SPGrcLvRHc38RAMN66TD_WWFHyCHnY_aOnz79Nk_-6ZewExuLDBew1ZYBwZq3J9bdgQM4-NFB55hSmaVcLgf-S4IsgTPcJb8i-DCNlf1Na1LWrIruI6zMk_LjKTJ1e6ac8rjsspyntEipknDiopmGctZncQ1ZFfimkS-b4qLiNAojeYk4ywnOU15E1FWNSiJoGVCzgcjX4UJ_Tork6i4kqwCacOlGCEKXnHYRISg9O7KXIfZvuq2FiWRFNbZMxcnnAy3af1Znt5hYUHiLSgwvpc83Xk9P6wvriq0Gqx31Rl5_edXDEGH_wsAAP___eTwYQ">