<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/69001>69001</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [x86] The x86 backend seems to break the cse optimizations
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          ZY546
      </td>
    </tr>
</table>

<pre>
    For the following test cases, `cse` has been done in llvm ir, but on x86, the final assembler code seems to break this optimization:
https://godbolt.org/z/EYc9c66jK
```cpp
extern int x, y;
void test(int a, int b) {

    x = a + b + 1;
    y = a + b + 2;
}
```
```llvm
define dso_local void @test(int, int)(i32 noundef %a, i32 noundef %b) local_unnamed_addr {
entry:
  %add = add nsw i32 %b, %a
  %add1 = add nsw i32 %add, 1
  store i32 %add1, ptr @x, align 4
  %add3 = add nsw i32 %add, 2
  store i32 %add3, ptr @y, align 4
  ret void
}
```
```asm
test(int, int): # @test(int, int)
        lea     eax, [rsi + rdi]
        inc eax
        mov     rcx, qword ptr [rip + x@GOTPCREL]
        mov dword ptr [rcx], eax
        lea     eax, [rsi + rdi]
        add eax, 2
        mov     rcx, qword ptr [rip + y@GOTPCREL]
        mov dword ptr [rcx], eax
        ret
```

Maybe `lea     eax, [rsi + rdi]` should not be repeated twice.
</pre>
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