<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/68561>68561</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[SPIRV] Changing register type breaks valid instruction
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:SPIR-V
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
iliya-diyachkov
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
pmatos
</td>
</tr>
</table>
<pre>
Currently the test `llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll` is failing. Backtrace looks like:
```
*** Bad machine code: inconsistent constant size ***
- function: getConstantI6
- basic block: %bb.1 (0x5615732c1988)
- instruction: %6:id(s32) = G_CONSTANT i6 2
LLVM ERROR: Found 1 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: /home/pmatos/dev/llvm-project/build/bin/llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_arbitrary_precision_integers test.ll --print-before-all -o - -debug
1. Running pass 'Function Pass Manager' on module 'test.ll'.
2. Running pass 'Verify generated machine code' on function '@getConstantI6'
#0 0x00007fd9bc1be77d llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/pmatos/dev/llvm-project/llvm/lib/Support/Unix/Signals.inc:723:11
#1 0x00007fd9bc1bec6b PrintStackTraceSignalHandler(void*) /home/pmatos/dev/llvm-project/llvm/lib/Support/Unix/Signals.inc:798:1
#2 0x00007fd9bc1bcc96 llvm::sys::RunSignalHandlers() /home/pmatos/dev/llvm-project/llvm/lib/Support/Signals.cpp:105:5
#3 0x00007fd9bc1bf485 SignalHandler(int) /home/pmatos/dev/llvm-project/llvm/lib/Support/Unix/Signals.inc:413:1
#4 0x00007fd9bb86e520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
#5 0x00007fd9bb8c29fc __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
#6 0x00007fd9bb8c29fc __pthread_kill_internal ./nptl/pthread_kill.c:78:10
#7 0x00007fd9bb8c29fc pthread_kill ./nptl/pthread_kill.c:89:10
#8 0x00007fd9bb86e476 gsignal ./signal/../sysdeps/posix/raise.c:27:6
#9 0x00007fd9bb8547f3 abort ./stdlib/abort.c:81:7
#10 0x00007fd9bc08b604 llvm::report_fatal_error(llvm::Twine const&, bool) /home/pmatos/dev/llvm-project/llvm/lib/Support/ErrorHandling.cpp:125:5
#11 0x00007fd9c002190c (anonymous namespace)::MachineVerifierPass::runOnMachineFunction(llvm::MachineFunction&) /home/pmatos/dev/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp:327:7
#12 0x00007fd9bfe96e55 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /home/pmatos/dev/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:91:8
#13 0x00007fd9bcc25fd8 llvm::FPPassManager::runOnFunction(llvm::Function&) /home/pmatos/dev/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1435:23
#14 0x00007fd9bcc2af62 llvm::FPPassManager::runOnModule(llvm::Module&) /home/pmatos/dev/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1481:16
#15 0x00007fd9bcc26962 (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) /home/pmatos/dev/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1550:23
#16 0x00007fd9bcc264cd llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/pmatos/dev/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:535:16
#17 0x00007fd9bcc2b241 llvm::legacy::PassManager::run(llvm::Module&) /home/pmatos/dev/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1677:3
#18 0x0000561572da2bd0 compileModule(char**, llvm::LLVMContext&) /home/pmatos/dev/llvm-project/llvm/tools/llc/llc.cpp:757:41
#19 0x0000561572da0ebd main /home/pmatos/dev/llvm-project/llvm/tools/llc/llc.cpp:416:13
#20 0x00007fd9bb855d90 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:58:16
#21 0x00007fd9bb855e40 call_init ./csu/../csu/libc-start.c:128:20
#22 0x00007fd9bb855e40 __libc_start_main ./csu/../csu/libc-start.c:379:5
#23 0x0000561572da0695 _start (/home/pmatos/dev/llvm-project/build/bin/llc+0x2d695)
[1] 160136 IOT instruction rr record /home/pmatos/dev/llvm-project/build/bin/llc -O0 test.ll -o -
```
Reproduce with test.ll as:
```
; RUN: llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_arbitrary_precision_integers %s -o - | FileCheck %s
define i6 @getConstantI6() {
ret i6 2
}
```
Command line is: `bin/llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_arbitrary_precision_integers test.ll --print-before-all -o - -debug`
I did some investigation on this and failure comes from the SPIRVPreLegalizer.cpp. Instruction is `%5:anyid(s6) = G_CONSTANT i6 2`, which is valid due to `SPV_INTEL_arbitrary_precision_integers`, however we enter `processInstrsWithTypeFolding` which calls `processInstr` for that specific instruction and exchanges the assigned register so that the instructions ends up as `%6:id(s32) = G_CONSTANT i6 2`. However this fails the machine verifier because the source value is i6 and the destination is s32.
I tried to grok the code but I am unsure what's going on here or even what the purpose of this code is. Since you (@iliya-diyachkov) developed the initial code, can you take a look at this? Otherwise, if you let me know what's going on I can try to come up with a fix.
</pre>
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