<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/68221>68221</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
SIOptimizeExecMasking causes Bad machine code: Using an undefined physical register
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:AMDGPU,
crash-on-valid
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
jayfoad
</td>
</tr>
</table>
<pre>
With the attached [test case](https://github.com/llvm/llvm-project/files/12804259/reduced.txt) I get:
```
$ ~/llvm-release/bin/llc -march=amdgcn -mcpu=gfx1100 -o /dev/null -verify-machineinstrs reduced.txt
# After SI optimize exec mask operations
# Machine code for function main: NoPHIs, TracksLiveness, NoVRegs, TiedOpsRewritten, TracksDebugUserValues
Function Live Ins: $vgpr0
bb.0.bb:
successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
liveins: $vgpr0
renamable $vgpr1 = COPY $vgpr0, implicit $exec
renamable $sgpr0 = S_MOV_B32 0
renamable $sgpr1 = COPY renamable $sgpr0
renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec
renamable $sgpr2 = COPY renamable $sgpr0
renamable $sgpr3 = COPY renamable $sgpr0
BUFFER_STORE_DWORDX2_OFFSET_exact killed renamable $vgpr0_vgpr1, killed renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, 344, 1, 0, implicit $exec :: (dereferenceable store (s64), align 1, addrspace 8)
$sgpr0 = S_MOV_B32 $exec_lo
V_CMPX_EQ_U32_nosdst_e64 0, $vgpr1, implicit-def $exec, implicit $exec
S_CBRANCH_EXECZ %bb.2, implicit $exec
S_BRANCH %bb.1
bb.1.bb1:
; predecessors: %bb.0
successors: %bb.2(0x80000000); %bb.2(100.00%)
renamable $sgpr0_sgpr1 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @llvm.amdgcn.raw.atomic.buffer.load.i32 + 4, target-flags(amdgpu-gotprel32-hi) @llvm.amdgcn.raw.atomic.buffer.load.i32 + 12, implicit-def dead $scc
renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed renamable $sgpr0_sgpr1, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
$vgpr0 = V_MOV_B32_e32 0, implicit $exec
$vgpr1 = V_MOV_B32_e32 0, implicit $exec
$vgpr2 = V_MOV_B32_e32 0, implicit $exec
$vgpr3 = V_MOV_B32_e32 0, implicit $exec
$vgpr4 = V_MOV_B32_e32 0, implicit $exec
$vgpr5 = V_MOV_B32_e32 0, implicit $exec
$vgpr6 = V_MOV_B32_e32 0, implicit $exec
$sgpr8_sgpr9 = S_MOV_B64 0
dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr0_sgpr1, @llvm.amdgcn.raw.atomic.buffer.load.i32, <regmask $sgpr_null $sgpr_null_hi $src_private_base $src_private_base_hi $src_private_base_lo $src_private_limit $src_private_limit_hi $src_private_limit_lo $src_shared_base $src_shared_base_hi $src_shared_base_lo $src_shared_limit $src_shared_limit_hi $src_shared_limit_lo $sgpr30 $sgpr31 $sgpr32 $sgpr33 $sgpr34 $sgpr35 $sgpr36 $sgpr37 $sgpr38 $sgpr39 $sgpr40 $sgpr41 $sgpr42 $sgpr43 $sgpr44 $sgpr45 $sgpr46 $sgpr47 $sgpr48 and 1194 more...>, implicit undef $sgpr4_sgpr5, implicit undef $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit undef $sgpr10_sgpr11, implicit undef $sgpr12, implicit undef $sgpr13, implicit undef $sgpr14, implicit undef $sgpr15, implicit undef $vgpr31, implicit $vgpr0, implicit $vgpr1, implicit killed $vgpr2, implicit killed $vgpr3, implicit killed $vgpr4, implicit killed $vgpr5, implicit killed $vgpr6, implicit-def dead $vgpr0
ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
bb.2.bb3:
; predecessors: %bb.0, %bb.1
S_ENDPGM 0
# End machine code for function main.
*** Bad machine code: Using an undefined physical register ***
- function: main
- basic block: %bb.0 bb (0x85ac210)
- instruction: V_CMPX_EQ_U32_nosdst_e64 0, $vgpr1, implicit-def $exec, implicit $exec
- operand 1: $vgpr1
LLVM ERROR: Found 1 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0WEtz6jgW_jVmcwqXLdtcWLAADN2ZCSEDN7l3ZuOS5YNRxw9KkuncWcxvn5JsjAmETlLVFAXyeX1HOg9LolLytEAcW8HUCsIerdSuFOM_6K9tSZNeXCa_xj-42oHaIVClKNthAlYwVSgVMCrRCkKLDHdK7aXlTSyysMgi5WpXxTYrc4sssuxw_OvvRfkHMmWRxZZnKC2ycMnQ8UkwsshCYFIxTGz1qiwygjtIUWmTTmg5E2vgNN_6kfjwv6NVgRlqT8gi5oUhMujnVLCd5YU0T1JWQD9n-8rywnT76rqOA_0SLLJI8GCRRVFlGfQPKPj2Vz-nbMcL5IVUQkLXpxq4gfdgslUoYHMH5V7xnP8XAV-RQU7lC5R7FFTxspAn-WVtGFiZIGxLAduqYFoGcsoLy5vAQ_n4-520yAy-C8pe5D0_YIHSUB7K5zWmNZNjstrLNf4puFJYnBRCjKv0SaJ4plmFDfbiCKPNwV2hwwQW8Q_pXjjdScWx7dhx3C45gKwYQylL0egEcWy7Fhk6r75Tfywy0vA1i1ywvGlHK3BsTQ0udLqMBjnjBx2CS1cBBBY0p3GGR44LlhfCbPX475MsmQHP9xlnXGmijsxVfamljf4mWq6eo6lH4Ih0IdgBujTyrnu1-eej-QgNxGccJJ_G1RzvA1rTp8Vivo4231freRT-WK3DnyRaLRab-fcIXylT8MKzDJMrs4rM0ut5XBMxIJFZNPNLzK-nxc3cPd_Xf25LeLsYoNPQRH-YoMAtCiwYGvNSlUKDDOXAb3KJZjwtams0SYTcU4Yw7OTTO6FuwKKsPAo-R7Pl489o_q_oySNRUcpEqggHfu3lMeO6HvcT3LYhvBHWTTSbricPs9-j-c_57D-n_L-lUmu0RXRera4dx-6pQ3pT2AtM8KJknVv1XBft8FrRapbrvC3O9-soOhXJ5i56nEWTMIzW8_smo0BRkaLqbzOqG9lQd-Z91U9LtReYeaSflbrvW76ju7pdN25b0D9tqsqcMzuutlsUdlbSxOYmelMwafRXhnf884ZdchHkBGliJstuNJPuIkT3q0nY1tXdcvlXtdKWg3Mj_3lxoILTQoF2-FQIsBVlDmmpzsvA75TBJPzHbHJ_v_k-mf3z6bGBujnPK4luKvkibxvqqd6-1PvOWvrn9cgX9bwv6vlf1Au-qDf4gp4OzNCk16jb_UxLa6TagOulqFPRa-tYJ8xH8vbD5WWEvZnA1OyVGkuR2YV1H6IdN8-CRXvBD1RhFFOJ12jviEZZ-Zac8bzJ17fEKzZq-smI3FGByZkXHVLHQJd6oX7mQpd2aeDMAROcduSeiq4dee3Ib0dBOxq0o2_taNiORseR32L4LYbfYvgtht9i-C2G32L4LYY_BFok4LojH_JSoG3bljc_S9qq6LQW36RU8L7AwAh8u9aAmjx_X9dtEta9IUJu8LwbPP8G753pmN7jvp3J1S3sxb7jWJPH1neD593g-Td4wQ3e4N3XxtluvfvGCVc_Hv62d067KyJ2HHsf2hW1hxD3fGezieYP4eNvS3DenvnmRQL5zXOcfa7SfGFKzxW1G0-SFynQok4HXmAC-90vyRnNQGDKpT5ftiZqi_0WTVsAqM-ODSumkjOIs5K9dKYJcQz1Hi-gjLhOux3ogznkVq25v2vv26_Pw7oJ1F63pgz7_v55CfP1erXW3EVZacHzZUYhSiGbtX28n082c5BVrPsohbhKQeC-FApUCZ--ieBSVuYqwrQpXrCsStDcdzBB5Q5iyl6UoAztNzcRvWTsJSNvRHs4dgejgU-Gjhf0duNvsZ9gTBzPJ8lg4BASD7cDl1E3cFxkOOzxMXGI5zqO7_qO4wU29cgocAfDAToJut7I8h3MKc9s80YtRdozXo4HQ0LcXkZjzKS5siFEu4dFYnmTyTL87fHJIrpMLEKM9_2y6B9oxhNNDsKeGJvZx1Uq9fuaSyVPGIqrDMebu1VzoTF_Rbak8kWnKaOVRPnlPO5VIht_PTRm3v8PAAD__1oHupk">