<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/67257>67257</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Added modules have incompatible data layouts
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          mttbx
      </td>
    </tr>
</table>

<pre>
    Here's the error:
`Added modules have incompatible data layouts: e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128 (module) vs e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128 (jit)`
Note that the data layout string is the same between the module and the jit.

I used target machine to generate data layout.
```
unique_ptr<LLVMContext> _ctx;
unique_ptr<Module> _mdl;
_ctx = std::make_unique<LLVMContext>();
_mdl = std::make_unique<Module>("xx", *_ctx);


// module
InitializeNativeTarget();
InitializeNativeTargetAsmPrinter();
string err;
string target_triple = sys::getDefaultTargetTriple();
const Target *target = TargetRegistry::lookupTarget(target_triple, err);
TargetMachine *_target_machine;
_target_machine = target->createTargetMachine(
 target_triple, sys::getHostCPUName(), "", TargetOptions(), {});
_mdl->setDataLayout(_target_machine->createDataLayout());

// jit
ExitOnError protector;
unique_ptr<orc::LLJIT> jit = protector(orc::LLJITBuilder().create());

protector(jit->addIRModule(
 orc::ThreadSafeModule(std::move(_mdl), std::move(_ctx))));

```
</pre>
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