<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/67080>67080</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[X86] `i8` -> `half` vector conversion is scalarized
</td>
</tr>
<tr>
<th>Labels</th>
<td>
bug,
backend:X86,
performance,
llvm:SelectionDAG
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
dcaballe
</td>
</tr>
</table>
<pre>
The following vector conversion seems to be scalarized when compiled for AVX-512:
```
define <64 x half> @test(<64 x i8> %int8) {
%fp16 = uitofp <64 x i8> %int8 to <64 x half>
ret <64 x half> %fp16
}
```
`llc test.ll -mcpu=cascadelake`
```
vpmovzxbw %ymm0, %zmm1 vextracti32x4 $3, %zmm1, %xmm4
vpextrw $7, %xmm4, %eax
vcvtsi2ss %eax, %xmm2, %xmm2
vcvtps2ph $4, %xmm2, %xmm2
vmovd %xmm2, %eax
vpinsrw $0, %eax, %xmm0, %xmm5
vpextrw $6, %xmm4, %eax
vcvtsi2ss %eax, %xmm3, %xmm2
vcvtps2ph $4, %xmm2, %xmm2
vmovd %xmm2, %eax
vpinsrw $0, %eax, %xmm0, %xmm6
vextracti32x4 $2, %zmm1, %xmm3
vpextrw $7, %xmm3, %eax
vcvtsi2ss %eax, %xmm7, %xmm2
vcvtps2ph $4, %xmm2, %xmm2
vmovd %xmm2, %eax
vpinsrw $0, %eax, %xmm0, %xmm7
....
```
Interesting enough, the `float` -> `half` vector conversion seems to be supported:
```
define <64 x half> @test(<64 x float> %int8) {
%fp16 = fptrunc <64 x float> %int8 to <64 x half>
ret <64 x half> %fp16
}
```
```
vcvtps2ph $4, %zmm0, %ymm0
vcvtps2ph $4, %zmm1, %ymm1
vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
vcvtps2ph $4, %zmm2, %ymm1
vcvtps2ph $4, %zmm3, %ymm2
vinsertf64x4 $1, %ymm2, %zmm1, %zmm1
retq
```
So probably the intermediate `i8` -> `float` step in the conversion is where the implementation gap is.
</pre>
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