<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/66479>66479</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] Poor codegen for SSE ((x == 1) || (x == 2))
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:X86,
            new issue,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    https://godbolt.org/z/KT5fxKjbG
```c
#include <x86intrin.h>
__m128i cmp1OR2_epi32(__m128i x) {
    __m128i is1 = _mm_cmpeq_epi32(x, _mm_set1_epi32(1));
    __m128i is2 = _mm_cmpeq_epi32(x, _mm_set1_epi32(2));
    return _mm_or_si128(is1, is2);
}
```
I used 1 and 2, but it occurs with any 2 sequential constants.

Due to an InstCombine fold, instead of just comparing the 2 sequential values and ORing the result, we end up with:
```ll
define <2 x i64> @cmp1OR2_epi32(<2 x i64> noundef %x) {
entry:
  %0 = bitcast <2 x i64> %x to <4 x i32>
  %1 = add <4 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1>
  %or.i89 = icmp ult <4 x i32> %1, <i32 2, i32 2, i32 2, i32 2>
  %or.i8 = sext <4 x i1> %or.i89 to <4 x i32>
  %or.i = bitcast <4 x i32> %or.i8 to <2 x i64>
  ret <2 x i64> %or.i
}
```
```asm
cmp1OR2_epi32:
  pcmpeqd %xmm1, %xmm1
 paddd %xmm1, %xmm0
  movdqa .LCPI2_0(%rip), %xmm1 # xmm1 = [1,1,1,1]
 pminud %xmm0, %xmm1
  pcmpeqd %xmm1, %xmm0
  retq
```
I could /almost/ accept this if it meant we reduced constant loads, but on pre-SSE4 targets we end up with:
```asm
cmp1OR2_epi32:
  pcmpeqd %xmm1, %xmm1
  paddd %xmm0, %xmm1
  pxor .LCPI2_0(%rip), %xmm1
  movdqa .LCPI2_1(%rip), %xmm0 # xmm0 = [2147483650,2147483650,2147483650,2147483650]
  pcmpgtd %xmm1, %xmm0
 retq
```
Untangling the icmp_ult(add(x,-1),2) (or the general solution) shouldn't be too difficult.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJykVl9v4jgQ_zTmZQRKxiGQBx52YTlVPWlX7Z10b8iJHXDPsVP_ael--pMd_pSWdu90KIA9Gf9mPL-ZsZlzcquFWJDpVzJdjVjwO2MXd7f3sjN6VBv-sth53ztCvxBcE1xvDa-N8hNjtwTXPwmub_-Ytvvbh_o3kq1I9oWU2fA0hzlSqRsVuABCl_t5KbW3Uk92hH4bNDabLse5hKbr8-93uBG9pEhwfpTvCVZAZl8HbQCA4xvpciB0BZuu2zRdLx5Pa_cEl0nshM9P0pxgFR96FQv_ExZewbLCB6uTrrEbJ3OcE5xLl0cE6fC1Ppmt3gRsmN5AcIJDDkxzwLiwDh6kB9M0wTp4ln4HTL8AghOPQWgvmYLGaOeZ9m5yAE2_qyDAG2AabrTzS9PVUgtojeLJIe28YBxMCw_BeWhM1zMr9Rb8TlzCPzEVhEsufb87aljhgvIR6VmA0BxCn7yLuXK5M6UGARdtdIDQJcIeZFkQ-g1Ikb1l_lJBm6C5aIHg9DIVhPb25WQNokKWOKylb5jzbw3hdB_DQeiyiFKKpxRMa4dcYpxfaiTYuEtCl5IijAc2Px5dgBo7kfMqIcum6yEo_x4-fwWPR6Rrg_fQCdmJ_Rk1P4AeLH-y4ajxNl6Xjg0mBohzJI8QVlwJcVzyeYafpsx1g-SS_zOhfSpEnpjruiFKh-Gg0TPOr7zOjgCdeeKPDCa_L3_c4CaLqYVTK_tUuycwIEhhGNAVkOnXCHX-TldHa53UgZ9svPPmY3-zVyF7_KDsGxNUXLpmqjPOE1wDaxrRe_A76UC2sQl0gmkf680KHhrBT4UPyjDuju3CaOitGN_ffyvAM7sV3v2ySP8_Gxd0XI3P3thfkXGduvy6dnakLjtSh3kxK-a0TCX7ryYnetMGt_4T-j5k70_tmd6qY2eMlb5JvXHOOD8cIePh9Fli6mE4NzbpboUWlilwRgUvjY5v3S7mgiY481DHFm6Ay7aVTVB-MuILyitasZFY5GVVzMqqpOVot5gWWZu3ZcEqbCqRi3n8NCUr6azBjLUjucAMaVbl06zCjJaTUmRl3WTIBRUFVhUpMtExqSZKPXXxiB9J54JYlGUxq0aK1UK5dFVArFnzt9Cc0C9_zUuCsUcRRC2eIS05STrpnOBj03vZyZ9s2CHGu4ZdRCvjOmwdKTIlnXdnu156lW4lEX26gh_GWGgMF1uhoTUW7u9jt4nH6z5SH9nPh8NhSWaRt7P8cFKPglVvLzPS70I9aUxHcB1tH_7GvTUPook1mHbjCK5TDP4JAAD__72UjH4">